MPC8280 datasheet(882/1386 Pages) FREESCALE

882 / 1386 page

Serial Management Controllers (SMCs)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

28-28

Freescale Semiconductor

Data length represents the number of octets the CP should transmit from this buffer. It is never modified

by the CP. The data length can be even or odd, but if the number of bits in the transparent character is

greater than 8, the data length should be even. For example, to transmit three transparent 8-bit characters,

the data length field should be initialized to 3. However, to transmit three transparent 9-bit characters, the

data length field should be initialized to 6 because the three 9-bit characters occupy three half words in

memory.

The data buffer pointer points to the first byte of the buffer. They can be even or odd, unless character

length is greater than 8 bits, in which case the transmit buffer pointer must be even. For instance, the

pointer to 8-bit transparent characters can be even or odd, but the pointer to 9-bit transparent characters

must be even. The buffer can reside in internal or external memory.

28.4.10 SMC Transparent Event Register (SMCE)/Mask Register (SMCM)

The SMC event register (SMCE) generates interrupts and reports events recognized by the SMC channel.

When an event is recognized, the SMC sets the corresponding SMCE bit. Interrupts are masked in the

SMCM, which has the same format as the SMCE. SMCE bits are cleared by writing a 1 (writing 0 has no

effect). Unmasked bits must be cleared before the CP clears the internal interrupt request. The SMCE and

SMCM registers are displayed in Figure 28-14.

Table 28-16 describes SMCE/SMCM fields.

Underrun. Set when the SMC encounters a transmitter underrun condition while sending the buffer.

—

Reserved, should be cleared.

01234567

Field

—

TXE

—

BSY

TXB

RXB

Reset

R/W

Addr

0x11A86 (SMCE1), 0x11A96 (SMCE2)/ 0x11A8A (SMCM1), 0x11A9A (SMCM2)

Figure 28-14. SMC Transparent Event Register (SMCE)/Mask Register (SMCM)

Table 28-16. SMCE/SMCM Field Descriptions

Bits

Name

Description

0–2

—

Reserved, should be cleared.

TXE

Tx error. Set when an underrun error occurs on the transmitter channel. This event is not maskable

via the TxBD[I] bit.

—

Reserved, should be cleared.

BSY

Busy condition. Set when a character is received and discarded due to a lack of buffers. Reception

begins after a new buffer is provided. Executing an ENTER HUNT MODE command makes the receiver

wait for resynchronization.

Table 28-15. SMC Transparent TxBD Field Descriptions (continued)

Bits Name

Description

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