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MPC8280 Datasheet(PDF) 886 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 886 Page - Freescale Semiconductor, Inc

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Serial Management Controllers (SMCs)
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
28-32
Freescale Semiconductor
28.5.3.2
SMC GCI C/I Channel Reception Process
The SMC receiver continuously monitors the C/I channel. When it recognizes a change in the data and this
value is received in two successive frames, it is interpreted as valid data. This is called the double last-look
method. The CP stores the received data byte in the C/I RxBD and a maskable interrupt is generated. If the
SMC is configured to support SCIT channel 1, the double last-look method is not used.
28.5.4
SMC GCI Commands
The commands in Table 28-18 are issued to the CPCR.
28.5.5
SMC GCI Monitor Channel RxBD
This BD, seen in Figure 28-15, is used by the CP to report information about the monitor channel receive
byte.
Table 28-19 describes SMC monitor channel RxBD fields.
Table 28-18. SMC GCI Commands
Command
Description
INIT TX AND RX
PARAMETERS
Initializes transmit and receive parameters in the parameter RAM to their reset state. It is especially
useful when switching protocols on a given serial channel.
TRANSMIT
ABORT REQUEST
This receiver command can be issued when the MPC8280 implements the monitor channel protocol.
When it is issued, the MPC8280 sends an abort request on the A bit.
TIMEOUT
This transmitter command can be issued when the MPC8280 implements the monitor channel protocol.
It is usually issued because the device is not responding or A bit errors are detected. The MPC8280
sends an abort request on the E bit at the time this command is issued.
0123
4
7
8
15
Offset + 0
E
l
ER
MS
—DATA
Figure 28-15. SMC Monitor Channel RxBD
Table 28-19. SMC Monitor Channel RxBD Field Descriptions
Bits
Name
Description
0
E
Empty.
0 The CP clears E when the byte associated with this BD is available to the core.
1 The core sets E when the byte associated with this BD has been read.
1
L
Last (EOM). Valid only for monitor channel protocol and is set when the EOM indication is received
on the E bit. Note that when this bit is set, the data byte is invalid.
2
ER
Error condition. Valid only for monitor channel protocol. Set when an error occurs on the monitor
channel protocol. A new byte is sent before the SMC acknowledges the previous byte.
3
MS
Data mismatch. Valid only for monitor channel protocol. Set when two different consecutive bytes
are received; cleared when the last two consecutive bytes match. The SMC waits for the reception
of two identical consecutive bytes before writing new data to the RxBD.



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