MPC8280 datasheet(1000/1386 Pages) FREESCALE

1000 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

31-40

Freescale Semiconductor

31.10.1.3 Global Mode Entry (GMODE)

Figure 31-23 shows the layout of the global mode entry (GMODE).

Table 31-14 describes GMODE fields.

Field

GBL

ALB CTB REM

IMA_EN1

1 MPC8264 and MPC8266 only.

UEAD

CUAB EVPT

ALM

Figure 31-23. Global Mode Entry (GMODE)

Table 31-14. GMODE Field Descriptions

Bits

Name

Description

0–1

—

Reserved, should be cleared.

GBL

Global. Asserting GBL enables snooping of connection tables and address compression tables.

GBL should not be asserted if any of the related DMAs will access the local bus.

3–5

—

Reserved, should be cleared.

ALB

Address look up bus for CAM or address compression tables

0 Reside on the 60x bus.

1 Reside on the local bus.

CTB

External connection tables bus

0 Reside on the 60x bus.

1 Reside on the local bus.

8REM1

Receive emergency mode

0 Enable REM operation. When the receive FIFO is full, the ATM transmitter stops sending data

cells until the receiver emergency state is cleared (FIFO not full). The transmitter pace is

maintained, although a small CDV may be introduced. This mode enables the receiver to receive

bursts of cells above the steady state performance.

1 Disable REM operation. Note that to check system performance the user may want to set this bit.

9–10

—

Reserved, should be cleared.

IMA_E

MPC8264 and MPC8266 only: Enable the associated FCC in IMA mode.

0 Default. FCC Enabled in normal ATM mode

1 FCC enabled in IMA mode

Note that individual PHYs of those IMA-mode enabled FCCs may still be set for non-IMA

functionality via the IMAPHY register in the IMA root table.

UEAD

User-defined cells extended address mode. See Section 31.7.1, “UDC Extended Address Mode

(UEAD).”

0 Disable UEAD mode.

1 Enable UEAD mode.

CUAB

Check unallocated bits

0 Do not check unallocated bits during address compression.

1 Check unallocated bits during address compression.

EVPT

External address compression VP table

0 VP table resides in dual-port RAM.

1 VP table reside in external memory.

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