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MPC8280 Datasheet(PDF) 1121 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1121 Page - Freescale Semiconductor, Inc |
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1121 / 1386 page ![]() ATM AAL2 MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 33-15 Figure 33-9 shows a CPS TxBD. Table 33-3 describes the CPS TxBD fields. . 0 1 2 3 4 7 8 15 Offset + 0x00 R CM W I — CPS Packet Header Offset + 0x02 CPS Packet Header Offset + 0x04 Tx Data Buffer Pointer (TXDBPTR) Offset + 0x06 Figure 33-9. CPS TxBD Table 33-3. CPS TxBD Field Descriptions Offset Bits Name1 1 Boldfaced entries must be initialized by the user. Description 0x00 0 R Ready 0 The buffer associated with this BD is not ready for transmission. The user is free to manipulate this BD or its associated buffer. The CP clears R after the buffer is sent or after an error condition is encountered. 1 The user-prepared buffer has not been sent or is currently being sent. No fields of this BD may be written by the user once R is set. 1 CM2 2 Setting Continuous mode (TxBD[CM] = 1) is not allowed in CID switching mode. Continuous mode 0 Normal operation. 1 The CP does not clear R after this BD is closed, allowing the associated buffer to be retransmitted automatically when the CP next accesses this BD. However, the R bit is cleared if an error occurs during transmission, regardless of the CM bit setting. 2 W Wrap (final BD in table) 0 This is not the last BD in the TxBD table. 1 This is the last BD in the TxBD table. After this buffer is used, the CP transmits outgoing data for this channel from the first BD in the table (the BD pointed to by the channel’s TxBD_table_Base in the TxQD). The number of TxBDs in this table is determined only by the W bit. 3 I Interrupt 0 No interrupt is generated after this buffer has been serviced. 1 A Tx Buffer event is sent to the interrupt queue after this buffer is serviced. The GHIN/GLIN bit in the event register is set when the INT_CNT counter reaches terminal count. 4–7 — Reserved, should be cleared during initialization. 8–15 CPS Packet Header This field contains the beginning (MSB) of the 3-byte packet header. See Figure 33-10 for the CPS packet header format. 0x02 — CPS Packet Header This field contains the rest of the packet header. If TxQD[HEC] = 0, the HEC part of the packet header is calculated by the CP, and the user may disregard the five least-significant bits of this field. See Figure 33-10 for the CPS packet header format. 0x04 — TXDBPTR Tx data buffer pointer. Points to the address of the associated buffer. There are no byte-alignment requirements for the buffer, and it may reside in either internal or external memory. This pointer is not modified by the CP. |
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