MPC8280 datasheet(1122/1386 Pages) FREESCALE

1122 / 1386 page

ATM AAL2

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

33-16

Freescale Semiconductor

33.3.5.4

SSSAR Tx Queue Descriptor

A SSSAR TxBD table and its associated buffers are collectively called an SSSAR TX Queue. Each

SSSAR TX Queue is managed by an SSSAR TxQD, as shown in Figure 33-11. The TxQD contains the

base address of the BD table, the offset of the next BD to be serviced, the data buffer pointer, and other

queue-specific parameters. The NextQueue pointer is used to create a linked list of TxQDs, as described

in Section 33.3.2, “Transmit Priority Mechanism.” The SSSAR TxQD is located in the dual-port RAM in

a 32-byte aligned address.

Channel identifier (CID)

Length indicator (LI)

User-to-user ID (UUI)

Header error check (HEC)

Figure 33-10. CPS Packet Header Format

Offset + 0x00

—

BNM

UUI

INF

CPS TBM SSSAR

—

Offset + 0x02

Seg_Len

—

Offset + 0x04

TxBD Table Base

Offset + 0x06

Offset + 0x08

TxBD Table Offset Out

Offset + 0x0A

—

Offset + 0x0C

NextQueue

Offset + 0x0E

—

Offset + 0x10

Offset + 0x12

Offset + 0x14

Offset + 0x16

Offset + 0x18

Offset + 0x1a

Offset + 0x1C

Offset + 0x1E

Figure 33-11. SSSAR Tx Queue Descriptor

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