MPC8280 datasheet(1209/1386 Pages) FREESCALE

1209 / 1386 page

Inverse Multiplexing for ATM (IMA)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

34-63

7. Indicate that this link is no longer assigned to a group: ILRCNTL[GA] = 0.

8. Inhibit reception of cells over dropped link in the IMA Root Table: RXPHYEN &= ~x (i.e., clear

the corresponding link bit in the RXPHYEN entry). Note, you must reenable (set to 1) the

corresponding bit at a later point if you wish to use this link as a non-IMA link.

9. Software should wait (poll) for the MPC8280 to be using the new group order table. This simply

ensures that it is safe to modify/re-use the dropped link parameters (i.e., the MPC8280 is no longer

using the dropped link’s data structures). Do this by making sure the group order pointer points to

the new group order table (at this point, no more cells are extracted out of the dropped link’s DCB),

e.g.,: while (dcblink != new_pointer). DCBLINK is an entry in the IGRTE.

10. Indicate that this link is no longer an IMA Link in the IMA Root Table: IMAPHY &= ~x (clear the

bit). Note, in a symmetrical operation, this step should be the last one performed (after both RX

and TX have been disabled). Setting this bit prematurely will halt transmission/reception on the

corresponding link.

34.5.4.5.2

TX Parameters

1. Formulate new group order table with the “dropped” link excluded (see Section 34.4.4.1.3,

“Transmit Group Order Table”).

2. Point to new TX Group Order Table in the corresponding IMA Group Transmit Table Entry

(IGTTE): TGRPORDER = New Table Offset.

3. Decrement the number of links in the group (IGTTE): TNUMLINKS -= 1.

4. Inhibit transmission of cells over dropped link in the IMA Root Table: TXPHYEN &= ~x (i.e.,

clear the corresponding link bit in the TXPHYEN entry). Note, you must reenable (set to 1) the

corresponding bit at a later point if you wish to use this link as a non-IMA link.

5. Indicate that this link is no longer an IMA Link in the IMA Root Table: IMAPHY &= ~x (clear the

bit). Note, in symmetrical operation, this step should be the last one performed (after both RX and

TX have been disabled). Setting this bit prematurely will halt transmission/reception on the

corresponding link.

34.5.4.6

Link Receive Deactivation Procedure

The following procedure assumes that the link was part of the IMA group during the group delay

synchronization procedure and that an IFSW (IMA Frame Synchronization Working) event has already

been received for the link.

1. Formulate new group order table with the “dropped” link excluded (see Section 34.4.4.2.4,

“Receive Group Order Tables").

2. Decrement RNUMLINKS in the group receive table

3. The “Stall Threshold” needs to be recalculated. This parameter defines the acceptable tolerance to

an emptied DCB condition (stalled link, see LS exception). The recommended new value is:

STALL_THR = 2 x RNUMLINKS x (3 + RX_FIFO). See Section 34.4.4.2, “IMA Group Receive

Table Entry”: IGRTE[STALL_THR] = x.

4. Inhibit storing of cells in DCB for “dropped” link (in IMA Root Table): REF_LINK &= ~x (i.e.,

clear the corresponding link bit in the REF_LINK entry).

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