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MPC8280 Datasheet(PDF) 1215 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1215 Page - Freescale Semiconductor, Inc |
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1215 / 1386 page ![]() Inverse Multiplexing for ATM (IMA) MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 34-69 9. Program to appropriate rate and enable timer if using a BRG (refer to Chapter 17, “Baud-Rate Generators (BRGs)”): TMRx, TRRx, and TGCRx. Note: This is only required if the IDCR clock is supplied by the MPC8280. If an external source is used, this step can be skipped. An external connection (physical) is required between the output of the BRG (TOUTx) and DREQx (see step 7 above). 10. Enable IDMAx interrupts (refer to Section 19.8.4, “IDMA Event Register (IDSR) and Mask Register (IDMR)”). 11. Clear IDCR table entries (reset to zero). 12. Issue the IDCR Initialization command (see Section 34.4.8.3, “IDCR_Init Command”). After this point, the IDCR mechanism can be used. 34.5.4.12.2 Activating a Group in IDCR Mode The following steps are required when activating a group in IDCR mode. 1. Configure the corresponding group to operate in IDCR mode: IGRCNTL[IDCR] = 1. 2. Indicate which is the last group that has IDCR enabled. Groups are numbered 0-7. As additional groups are created/added or removed, this field must also be modified accordingly with the group number of the last group (in the order of 0-7) that has IDCR enabled. For example, lets say groups 0 and 1 are active and group 2 is being added. Then IMAROOT[IDCR_LAST] = 2. 3. After GDS has been achieved, the software can now read the captured TRLR value (see IGRTE[TRLR]). At this point, the group’s corresponding IDCR Table Entry can be programmed. IDCRCNT and IDCRREQ are both initialized to the integer part of: ((TRLR/(num_links x 128)) x (2048/2049)). IDCRCNTF and IDCRREQF are both initialized to the fraction value of the previous equation times 65536. For example, lets say ((TRLR/(num_links x 128)) x (2048/2049)) yielded 10.45, then IDCRCNT and IDCRREQ would equal 10. IDCRCNTF and IDCRREQF would then be set to (.45 x 65536) = 29491 (0x7333). 4. Once the IDCR Table has been programmed, IDCR driven stream reconstruction for this group can start: IMAROOT[IDCREN] |= x. The corresponding bit must be cleared if this group is being deactivated/removed from a multi-group configuration. 34.5.4.13 End-to-End Channel Signalling Procedure 34.5.4.13.1 Transmit The end-to-end channel signalling field can be used by software to signal to the far end. Because the end-to-end channel is not covered by the SCCI field and there are no standard requirements for the minimum number of frames between changes of the end-to-end channel field, it is not necessary to follow the procedure for ICP cell signalling in order to do this; instead, the end-to-end channel field of the ICP template currently in use can be directly updated. However, if a minimum number of frames between changes is desired, then the procedure for ICP cell signalling can be used, skipping the step in which the SCCI is updated. |
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