MPC8280 datasheet(1237/1386 Pages) FREESCALE

1237 / 1386 page

Fast Ethernet Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

36-3

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Performs framing functions

— Preamble generation and stripping

— Destination address checking

— CRC generation and checking

— Automatic padding of short frames on transmit

— Framing error (dribbling bits) handling

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Full collision support

— Enforces the collision (jamming and TX_ER assertion)

— Truncated binary exponential backoff algorithm for random wait

— Two nonaggressive backoff modes

— Automatic frame retransmission (until retry limit is reached)

— Automatic discard of incoming collided frames

— Delay transmission of new frames for specified interframe gap

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Bit rates up to 100 Mbps

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Receives back-to-back frames

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Detection of receive frames that are too long

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Multibuffer data structure

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Supports 48-bit addresses in three modes

— Physical. One 48-bit address recognized or 64-bin hash table for physical addresses

— Logical. 64-bin group address hash table plus broadcast address checking

— Promiscuous. Receives all frames regardless of address (a CAM can be used for address

filtering)

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External CAM support on system bus interfaces

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Special RMON counters for monitoring network statistics

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Transmitter network management and diagnostics

— Lost carrier sense

— Underrun

— Number of collisions exceeded the maximum allowed

— Number of retries per frame

— Deferred frame indication

— Late collision

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Receiver network management and diagnostics

— CRC error indication

— Nonoctet alignment error

— Frame too short

— Frame too long

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