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MPC8280 Datasheet(PDF) 1333 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1333 Page - Freescale Semiconductor, Inc |
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1333 / 1386 page ![]() Parallel I/O Ports MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 41-17 Table 41-8 shows the port D pin assignments. PC6 TDM_C1: L1CLKO FCC1: CD GND FCC1: RxAddr[2]1 MPHY, master, multiplexed polling FCC1: RxAddr[2]1,3 MPHY, slave, multiplexed polling) FCC1: RxClav11,3 MPHY, master, direct polling FCC2: RxAddr[2]1 MPHY, slave, multiplexed polling GND PC5 FCC2: TxClav1 UTOPIA, slave FCC2: TxClav1 UTOPIA, master GND SI2: L1ST3 Strobe FCC2: CTS GND PC4 FCC2: RxEnb1 UTOPIA, master FCC2: RxEnb1 UTOPIA, slave GND SI2: L1ST4 Strobe FCC2: CD GND PC3 FCC2: TxD[2]1 UTOPIA 8 FCC3: CTS GND IDMA2: DACK SCC4: CTS SCC4: CLSN2 (secondary option) GND PC2 FCC2: TxD[3]1 UTOPIA 8 FCC3: CD GND IDMA2: DONE Inout VDD PC1 BRG6: BRGO IDMA2: DREQ GND TDM_A2: L1RQ SPI: SPISEL2 Inout (secondary option) PC0 BRG7: BRGO IDMA1: DREQ GND TDM_A2: L1CLKO SMC2: SMSYN (secondary option) GND 1 Not available on the MPC8270. 2 Available only when the primary option for this function is not used. 3 MPHY Address pins 3,4 (master mode) can come from FCC2, depending on CMXUAR programming. (See Section 16.4.1, “CMX UTOPIA Address Register (CMXUAR).”) Table 41-8. Port D Dedicated Pin Assignment (PPARD = 1) Pin Pin Function PSORD = 0 PSORD = 1 PDIRD = 1 (Output) PDIRD = 0 (Input) Defaul t Input PDIRD = 1 (Output) PDIRD = 0 (Input, or Inout if Specified) Defaul t Input PD31 SCC1: RXD GND PD30 FCC2: TxEnb1 UTOPIA master FCC2: TxEnb1 UTOPIA slave GND SCC1: TXD Table 41-7. Port C Dedicated Pin Assignment (PPARC = 1) (continued) PIN Pin Function PSORC = 0 PSORC = 1 PDIRC = 1 (Output) PDIRC = 0 (Input) Defaul t Input PDIRC = 1 (Output) PDIRC = 0 (Input or Inout if Specified) Defaul t Input |
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