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SN8F27E64KB Datasheet(PDF) 42 Page - SONiX Technology Company |
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SN8F27E64KB Datasheet(HTML) 42 Page - SONiX Technology Company |
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42 / 192 page ![]() SN8F27E60 Series 8-Bit Flash Micro-Controller with Embedded ICE and ISP SONiX TECHNOLOGY CO., LTD Page 42 Version 1.4 2.5 CODE OPTION TABLE The code option is the system hardware configurations including oscillator type, noise filter option, watchdog timer operation, LVD option, reset pin option and Flash ROM security control. The code option items are as following table: Code Option Content Function Description High_Clk IHRC_16M High speed internal 16MHz RC. XIN/XOUT pins are bi-direction GPIO mode. IHRC_RTC High speed internal 16MHz RC. XIN/XOUT pins are connected to external 32768Hz crystal. RC Low cost RC for external high clock oscillator. XIN pin is connected to RC oscillator. XOUT pin is bi-direction GPIO mode. 32K X’tal Low frequency, power saving crystal (e.g. 32.768KHz) for external high clock oscillator. 12M X’tal High speed crystal /resonator (e.g. 12MHz) for external high clock oscillator. 4M X’tal Standard crystal /resonator (e.g. 4M) for external high clock oscillator. High_Fcpu Fhosc/1 Normal mode instruction cycle is 1 high speed oscillator clocks. Fhosc/2 Normal mode instruction cycle is 2 high speed oscillator clocks. Fhosc/4 Normal mode instruction cycle is 4 high speed oscillator clocks. Fhosc/8 Normal mode instruction cycle is 8 high speed oscillator clocks. Fhosc/16 Normal mode instruction cycle is 16 high speed oscillator clocks. Fhosc/32 Normal mode instruction cycle is 32 high speed oscillator clocks. Fhosc/64 Normal mode instruction cycle is 64 high speed oscillator clocks. Fhosc/128 Normal mode instruction cycle is 128 high speed oscillator clocks. Low_Fcpu Flosc/1 Slow mode instruction cycle is 1 low speed oscillator clocks. Flosc/2 Slow mode instruction cycle is 2 low speed oscillator clocks. Flosc/4 Slow mode instruction cycle is 4 low speed oscillator clocks. Flosc/8 Slow mode instruction cycle is 8 low speed oscillator clocks. Noise_Filter Enable Enable Noise Filter. Disable Disable Noise Filter. WDT_CLK Flosc/4 Watchdog timer clock source Flosc/4. Flosc/8 Watchdog timer clock source Flosc/8. Flosc/16 Watchdog timer clock source Flosc/16. Flosc/32 Watchdog timer clock source Flosc/32. Watch_Dog Always_On Watchdog timer is always on enable even in power down and green mode. Enable Enable watchdog timer. Watchdog timer stops in power down mode and green mode. Disable Disable Watchdog function. Reset_Pin Reset Enable External reset pin. P04 Enable P0.4. Security Enable Enable ROM code Security function. Disable Disable ROM code Security function. LVD LVD_L LVD will reset chip if VDD is below 1.8V LVD_M LVD will reset chip if VDD is below 1.8V Enable LVD24 bit of PFLAG register for 2.4V low voltage indicator. LVD_H LVD will reset chip if VDD is below 2.4V Enable LVD33 bit of PFLAG register for 3.3V low voltage indicator. LVD_MAX LVD will reset chip if VDD is below 3.3V |
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