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LTM8024 Datasheet(PDF) 31 Page - Analog Devices

Part # LTM8024
Description  Quad 40VIN, 3A Silent Switcher μModule Regulator with Package-Level EMI Shield
PDF  43 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM8024 Datasheet(HTML) 31 Page - Analog Devices

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Data Sheet
LTM8060F
analog.com
Rev. 0
31 of 43
through its internal power switch. This is fine if your system can tolerate a few milliamps in this state. If you ground
the RUNn pin, the internal current drops to zero. However, if the VINn pin is grounded while the output is held high,
parasitic diodes inside the LTM8060F can pull large currents from the output through the VINn pin. Figure 66 shows a
circuit that runs only when the input voltage is present, and that protects against a shorted or reversed input.
Figure 66. The Input Diode Prevents a Shorted Input from Discharging a Backup Battery Connected to the Output. It also
Protects the Circuit from a Reversed Input, the LTM8060F Runs only when the Input is Present
PCB Layout
Most of the headaches associated with PCB layout design have been alleviated or even eliminated by the high level
of integration of the LTM8060F. The LTM8060F is nevertheless a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 67 for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
A few rules to keep in mind are:
1. Place the RFB and RT resistors as close as possible to their respective pins.
2. Place the CIN capacitor as close as possible to the VIN and GND connection of the LTM8060F.
3. Place the COUT capacitor as close as possible to the VOUT and GND connection of the LTM8060F.
4. Place the CIN and COUT capacitors such that their ground current flows directly adjacent to or underneath
the LTM8060F.
5. Connect all the GND connections to as large a copper pour or plane area as possible on the top layer.
Avoid breaking the ground connection between the external components and the LTM8060F.
6. Use vias to connect the GND copper area to the board’s internal ground planes. Liberally distribute
these GND vias to provide both a good ground connection and thermal path to the internal planes of the
PCB. Pay attention to the location and density of the thermal vias in Figure 67. The LTM8060F can benefit
from the heat sinking afforded by vias that connect to internal GND planes at these locations, due to their
proximity to internal power handling components. The optimum number of thermal vias depends upon
the PCB design. For example, a board might use very small via holes. It should employ more thermal vias
than a board that uses larger holes.
VIN
RUN
VIN
LTM8060F



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