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FS32K142HAT0MLHT Datasheet(PDF) 42 Page - NXP Semiconductors |
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FS32K142HAT0MLHT Datasheet(HTML) 42 Page - NXP Semiconductors |
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42 / 84 page ![]() 1 2 3 tSCK tIS tIH Clock SCK CS Data in tSDC tSDC Figure 9. QuadSPI input timing (SDR mode) diagram 1 2 3 tIV tOV tSCK tCSSCK tSCKCS Clock SCK CS Data out tSDC tSDC tSDC Invalid Figure 10. QuadSPI output timing (SDR mode) diagram invalid invalid D2 invalid invalid D4 D3 D1 D5 TIS TIS TIH TIH TIS– Setup Time TIH – Hold Time Figure 11. QuadSPI input timing (HyperRAM mode) diagram Memory and memory interfaces S32K1xx Data Sheet, Rev. 9, 09/2018 42 NXP Semiconductors |
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