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STM32L496QGI3 Datasheet(PDF) 233 Page - STMicroelectronics |
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STM32L496QGI3 Datasheet(HTML) 233 Page - STMicroelectronics |
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233 / 262 page ![]() DocID029173 Rev 1 233/262 STM32L496xx Electrical characteristics 235 6.3.30 SWPMI characteristics The Single Wire Protocol Master Interface (SWPMI) and the associated SWPMI_IO transceiver are compliant with the ETSI TS 102 613 technical specification. 6.3.31 SD/SDIO MMC card host interface (SDIO) characteristics Unless otherwise specified, the parameters given in Table 118 for the SDIO/MMC interface are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDD supply voltage conditions summarized in Table 22, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD Refer to Section 6.3.14: I/O port characteristics for more details on the input/output characteristics. Figure 56. SDIO high-speed mode Table 117. SWPMI electrical characteristics Symbol Parameter Conditions Min Typ Max Unit tSWPSTART SWPMI regulator startup time SWP Class B 2.7 V ≤ VDD ≤ 3,3V - - 300 μs tSWPBIT SWP bit duration VCORE voltage range 1 500 - - ns VCORE voltage range 2 620 - - |
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