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STM32L4S5AI Datasheet(PDF) 151 Page - STMicroelectronics |
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STM32L4S5AI Datasheet(HTML) 151 Page - STMicroelectronics |
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151 / 275 page ![]() DocID030322 Rev 2 151/275 STM32L4S5xx, STM32L4S7xx and STM32L4S9xx Electrical characteristics 250 APB1 (Cont.) I2C1 APB clock domain 1.4 1.4 1.25 2 µA/MHz I2C2 independent clock domain 3.5 3.4 2.5 3.5 I2C2 APB clock domain 1.4 1.25 1.25 1 I2C3 independent clock domain 3.25 3.15 2.9 3 I2C3 APB clock domain 1.15 1 0.835 1 I2C4 independent clock domain 3.5 3.25 2.75 3 I2C4 APB clock domain 1.35 1.25 1 1.5 LPUART1 independent clock domain 3.15 3 2.45 3 LPUART1 APB clock domain 1.65 1.5 1.3 1.5 LPTIM1 independent clock domain 3.6 3.5 2.9 3 LPTIM1 APB clock domain 1 0.875 0.835 1 LPTIM2 independent clock domain 3.4 3.25 2.55 3.5 LPTIM2 APB clock domain 1.1 1 0.79 1 OPAMP 0.415 0.375 0.415 0.5 PWR 0.5 0.375 0.415 0.5 RTCAPB 1.25 1.15 1.25 1 SPI2 2.6 2.4 2.1 2.5 SPI3 3 2.75 2.5 3 TIM2 6.15 5.75 4.65 4.5 TIM3 5.25 4.9 4.15 5 TIM4 5.15 4.75 4.15 5 TIM5 6.5 6 5 6 TIM6 1.35 1.15 1.25 1 TIM7 1.25 1.15 0.835 1 Table 43. Peripheral current consumption (continued) Peripheral Range 1 Boost Mode Range 1 Normal Mode Range 2 Low-power run and sleep Unit |
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