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STM32L4S5AI Datasheet(PDF) 224 Page - STMicroelectronics |
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STM32L4S5AI Datasheet(HTML) 224 Page - STMicroelectronics |
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224 / 275 page ![]() Electrical characteristics STM32L4S5xx, STM32L4S7xx and STM32L4S9xx 224/275 DocID030322 Rev 2 CAN (controller area network) interface Refer to Section 6.3.17: I/O port characteristics for more details on the input/output alternate function characteristics (CAN_TX and CAN_RX). 6.3.31 FSMC characteristics Unless otherwise specified, the parameters given in Table 97 to Table 110 for the FMC interface are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in Table 22, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5 x VDD Refer to Section 6.3.17: I/O port characteristics for more details on the input/output characteristics. Asynchronous waveforms and timings Figure 44 through Figure 47 represent asynchronous waveforms and Table 97 through Table 104 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataHoldTime = 0x1 • ByteLaneSetup = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode, DataSetupTime = 0x5) • BusTurnAroundDuration = 0x0 In all timing tables, the THCLK is the HCLK clock period. VLGC Logic threshold - 0.8 - 2.0 V VDAT_REF Data detect voltage - 0.25 - 0.4 V VDP_SRC D+ source voltage - 0.5 - 0.7 V VDM_SRC D- source voltage - 0.5 - 0.7 V IDP_SINK D+ sink current - 25 - 175 μA IDM_SINK D- sink current - 25 - 175 μA 1. Guaranteed by design Table 96. USB BCD DC electrical characteristics(1) (continued) Driver characteristics Symbol Parameter Conditions Min Typ Max Unit |
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