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VNF9D5F Datasheet(PDF) 51 Page - STMicroelectronics |
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VNF9D5F Datasheet(HTML) 51 Page - STMicroelectronics |
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51 / 108 page ![]() ITSTSR I²t self-test status register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - R/C R Address: 0x36h Type: R/C Reset: 0 Description: I²t self-test status register [15:7] - [6:4] I²t self-test status for channel 1 One bit for each tested value (Low, Medium, High) → 1: PASS 0: FAIL [3:1] I²t self-test status for channel 0 One bit for each tested value (Low, Medium, High) → 1: PASS 0: FAIL [0] Parity bit Note: Selective bitwise clear is disabled for this register. A R&C operation on this address will clear all clearable bits independently of payload content. VNF9D5F SPI functional description DS13946 - Rev 8 page 51/108 |
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