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VNF9D5F Datasheet(PDF) 69 Page - STMicroelectronics |
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VNF9D5F Datasheet(HTML) 69 Page - STMicroelectronics |
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69 / 108 page ![]() 9.2 I²t curve BIST At each power on reset, the digital part executes the I²t curve BIST. During the execution of that sequence, the fuse current sense is disabled and a multiplexer will pass low reference voltage (0 V) for combination <0, 0>, medium reference voltage (300 mV) for combination <0, 1> and high reference voltage (3 V) for combination <1, 0>. Table 46. I²t built in self-test I²t_bist <1> I²t_bist <0> VBIST 0 0 0 V 0 1 300 mV 1 0 3 V 1 1 High-Z For each setting, after a 10 μs delay time, the digital part will acquire the converted value and will compare it with the expected one. If the converted value is the expected one, the corresponding bit in the ITSTSR register (address 0x36h) is set high, otherwise it is set low. Configuration <1, 1> (default one) will end the BIST procedure by setting the multiplexer in high-Z, enabling the fuse current sense and the programmed fuse parameters. This combination is kept until the next power on reset. All channels are disabled till the completion of the procedure. They are allowed to turn on after I²t BIST execution time (~60 µs), after standby transition. VNF9D5F Safety-related functions DS13946 - Rev 8 page 69/108 |
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