IMSA110 datasheet(11/26 Pages) STMICROELECTRONICS

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7. GLOSSARY

This section defines the meaning of terms used

elsewhere in this data sheet.

Arithmetic Shift

For a right shift, the most significant bit is always

copied into the most significant end of the result.

For example shifting right by 2:

01000101

→

00010001

11000101

→

11110001

For a left shift, the least significant bit will become

zero.

Note that left shifting can cause overflows and

these are not detected in the MAC output scalar or

the data normaliser.

Rounding

All rounding done within the IMS A110 is equivalent

to truncating after adding 1/2 LSB. (Rounding is

always applied in the positive direction). For exam-

ple for 8 bit twos complement numbers undergoing

a two bit right shift:

00000011

→ 00000000 + 1 = 00000001 (rounded up)

00000010

→ 00000000 + 1 = 00000001 (rounded up)

11111110

→ 11111111 + 1 = 00000000 (rounded up)

00000001

→ 00000000

(no rounding)

11111101

→ 11111111

(no rounding)

Left shifts do not generate rounding.

Transversal Filter

A transversal filter is a calculation consisting of the

sum of products of successive points of input data.

For input data xi, xi+1, ..., and a set of coefficients,

c6,c5, ..., the result, Y is:

∑ci

× x6−i

Two’s Complement

Two’s complement numbers allow both positive

and negative numbers. For example in 8 bit num-

bers the most positive number is 127, the most

negative is -128:

two’s complement

decimal

10000000

-128

10000001

-127

11111111

-1

00000000

00000001

01111111

127

Rectification

Rectification is a method of removing negative

numbers. There are two methods: Full wave and

Half wave. In either case all positive numbers and

zero are unaffected. In Full wave rectification, any

negative numbers are negated (i.e. multiplied by 1)

so that they become positive. In Half wave rectifi-

cation, all negative numbers are replaced by zero.

Dynamic Range Compression

When Dynamic is used in this context, it is to

indicate a change of behaviour for each data point.

For example, a dynamic shift is one where the size

of the shift may change on each successive clock

cycle. Dynamic range compression is range com-

pression making use of an offset and shift, which

can change depending on each data point. This

allows the essential non-linear transformations re-

quired in image processing to be implemented on

the IMS A110.

Bit Fields

Bits, words and addresses in this data sheet are

little-endian; The lowest order byte of a multiple

byte word is referred to as byte 0, and is addressed

in the same way. Similarly, the least significant bit

of any bit field is that with the lowest bit number. For

example, ‘bits 26-22’ refers to a 5 bit field where bit

22 is treated as the least significant, and bit 26 as

the most significant.

Latency

Within the IMSA110 the latency is the number of

clock cycles from an input to its corresponding

output. For instance, with the programmable shift

registers bypassed by setting SCR[1] to 1, the

latency from PSRin to PSRout will be 2 as shown

in Figure 6.

IMSA110

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