S29GL01GS datasheet(38/118 Pages) INFINEON

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Datasheet

001-98285 Rev. *T

2023-07-17

128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash

Parallel, 3.0 V

Embedded operations

5.5.2

Data Polling Status

During an active embedded algorithm the EAC switches to the Data Polling ASO to display EA status to any read

access. A single word of status information is aliased in all locations of the device address space. In the status

word there are several bits to determine the status of an EA. These are referred to as DQ bits as they appear on

the data bus during a read access while an EA is in progress. DQ bits 15 to 8, DQ4, and DQ0 are reserved and

provide undefined data. Status monitoring software must mask the reserved bits and treat them as don’t care.

Table 15 and the following subsections describe the functions of the remaining bits.

5.5.2.1

DQ7: Data# Polling

The Data# Polling bit, DQ7, indicates to the host system whether an embedded algorithm is in progress or has

completed. Data# Polling is valid after the rising edge of the final WE# pulse in the program or erase command

sequence. Note that the Data# Polling is valid only for the last word being programmed in the write-buffer-page

during Write Buffer Programming. Reading Data# Polling status on any word other than the last word to be

programmed in the write-buffer-page will return false status information.

During the embedded program algorithm, the device outputs on DQ7 the complement of the data bit

programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the embedded

program algorithm is complete, the device outputs the data bit programmed to bit 7 of the last word

programmed. In case of a Program Suspend, the device allows only reading array data. If a program address falls

within a protected sector, Data# Polling on DQ7 is active for approximately 20 µs, then the device returns to

reading array data.

During the embedded erase or blank check algorithms, Data# Polling produces a ‘0’ on DQ7. When the algorithm

is complete, or if the device enters the Erase Suspend mode, Data# Polling produces a ‘1’ on DQ7. This is

analogous to the complement / true datum output described for the Embedded Program algorithm: the erase

function changes all the bits in a sector to ‘1’; prior to this, the device outputs the complement or ‘0’. The system

must provide an address within the sector selected for erasure to read valid status information on DQ7.

After an erase command sequence is written, if the sector selected for erasing is protected, Data# Polling on DQ7

is active for approximately 100 µs, then the device returns to reading array data.

When the system detects DQ7 has changed from the complement to true data, it can read valid data at

DQ15–DQ0 on the following read cycles. This is because DQ7 may change asynchronously with DQ6–DQ0 while

Output Enable (OE#) is asserted Low. This is illustrated in Figure 29. Table 15 shows the outputs for Data# polling

on DQ7. Figure 4 shows the Data# polling algorithm use in Write Buffer Programming.

Valid DQ7 data polling status may only be read from:

• the address of the last word loaded into the write buffer for a write buffer programming operation;

• the location of a single word programming operation;

• or a location in a sector being erased or blank checked;

• or a location in any sector during chip erase.

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