AM2431BSDGHIALVR. datasheet(250/282 Pages) TI2

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8 Applications, Implementation, and Layout

Note

Information in the following applications sections is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI’s customers are responsible for

determining suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

8.1 Device Connection and Layout Fundamentals

8.1.1 Power Supply

8.1.1.1 Power Supply Designs

The power supply implementation for this device requires a minimum of four sources when using ALX packaged

devices (or five sources when using ALV/ANI packaged devices) for the following voltage domains: 0.85V CORE

and RAM supplies, 3.3V IO supply, 1.8V IO supply and 1V8 analog supply. The ALV/ANI package requires

an additional source to supply the 1.1V/1.2V DDR IO supply. Refer to the evaluation module or starter kit

design files to better understand how specific supply pins can be grouped together. The power solution can

be implemented with general purpose Power Management ICs (PMICs) or discrete regulators like DCDCs

and LDOs. TPS65219 is an example of a cost and space optimized PMIC with integrated DCDCs, LDOs,

multi-function digital signals, sequencer, and supervisor providing the full power solution to supply the processor

and principal peripherals. For the most up to date power collateral, visit the TI’s Power supply solutions website.

Note

The device power supply implementation requires a dedicated 1.8V LDO to supply VPP only during

eFuse programming. This LDO is optional and only needed if on-board eFuse programming is

required.

8.1.1.2 Power Distribution Network Implementation Guidance

The Sitara Processor Power Distribution Networks: Implementation and Analysis provides guidance for

successful implementation of the power distribution network. This includes PCB stackup guidance as well as

guidance for optimizing the selection and placement of the decoupling capacitors. TI only supports designs that

follow the board design guidelines contained in the application report.

8.1.2 External Oscillator

For more information about External Oscillators, see the Clock Specifications section.

8.1.3 JTAG, EMU, and TRACE

Texas Instruments supports a variety of eXtended Development System (XDS™) JTAG controllers with various

debug capabilities beyond only JTAG support. A summary of this information is available in the XDS Target

Connection Guide.

For recommendations on JTAG, EMU, and TRACE routing, see the Emulation and Trace Headers Technical

Reference Manual

8.1.4 Unused Pins

For more information about Unused Pins, see the Pin Connectivity Requirements section.

AM2434, AM2432, AM2431

SPRSP65J – APRIL 2021 – REVISED JUNE 2026

www.ti.com

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