AM2431BSDGHIALVR. datasheet(246/282 Pages) TI2

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to self-diagnose and repair data errors. In a CAN network, many short messages are broadcast to the entire

network, which provides for data consistency in every node of the system.

The MCAN module supports both classic CAN and CAN FD (CAN with Flexible Data-Rate) specifications. CAN

FD feature allows high throughput and increased payload per data frame. The classic CAN and CAN FD devices

can coexist on the same network without any conflict.

The device supports 2 MCAN modules

For more information, see Modular Controller Area Network (MCAN) section in Peripherals chapter in the device

TRM.

7.4.2.13 MCRC Controller

VBUSM CRC controller is a module which is used to perform CRC (Cyclic Redundancy Check) to verify the

integrity of a memory system. A signature representing the contents of the memory is obtained when the

contents of the memory are read into MCRC Controller. The responsibility of MCRC controller is to calculate

the signature for a set of data and then compare the calculated signature value against a pre-determined good

signature value. MCRC controller provides four channels to perform CRC calculation on multiple memories in

parallel and can be used on any memory system. Channel 1 can also be put into data trace mode, where MCRC

controller compresses each data being read through CPU read data bus.

For more information, see MCRC Controller section in Interprocessor Communication chapter in the device

TRM.

7.4.2.14 MCSPI

The MCSPI module is a multichannel transmit/receive, controller/peripheral synchronous serial bus.

There are total of seven MCSPI modules in the device.

For more information, see Multichannel Serial Peripheral Interface (MCSPI) section in Peripherals chapter in the

device TRM.

7.4.2.15 MMCSD

There are two Multi-Media Card/Secure Digital (MMCSD) modules inside the device - MMCSD0 and MMCSD1.

Each MMCSD module includes one MMCSD Host Controller, where MMCSD0 is associated with MMC0 and

MMCSD1 is associated with MMC1.

The MMCSD Host Controller supports:

• One controller with 8-bit wide data bus

• One controller with 4-bit wide data bus

• Support of eMMC5.1 Host Specification (JESD84-B51)

• Support of SD Host Controller Standard Specification - SDIO 3.00

• Integrated DMA controller supporting SD Advanced DMA - ADMA2 and ADMA3

• eMMC Electrical Standard 5.1 (JESD84-B51)

• Multi-Media card features:

– Backward compatible with earlier eMMC standards

– Legacy MMC SDR: 1.8V, 8/4/1-bit bus width, 0-25MHz, 25/12.5/3.125 MB/s

– High Speed SDR: 1.8V, 8/4/1-bit bus width, 0-50MHz, 50/25/6.25 MB/s

– High Speed DDR: 1.8V, 8/4-bit bus width, 0-50MHz, 100/50 MB/s

– HS200 SDR: 1.8V, 0-200MHz, 8/4-bit bus width, 200/100 MB/s

• SD card support: SDIO, SDR12, SDR25, SDR50, DDR50

• System bus interface: CBA 4.0 VBUSM initiator port with 64-bit data width and 64-bit address, little Endian

only

• Configuration bus interface: CBA 4.0 VBUSM with 32-bit data width, 32-bit aligned accesses only, linear

incrementing addressing mode, little Endian only

For more information, see Multi-Media Card/Secure Digital (MMCSD) Interface section in Peripherals chapter in

the device TRM.

AM2434, AM2432, AM2431

SPRSP65J – APRIL 2021 – REVISED JUNE 2026

www.ti.com

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