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R5F564MFDDFB Datasheet(PDF) 77 Page - Renesas Technology Corp |
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R5F564MFDDFB Datasheet(HTML) 77 Page - Renesas Technology Corp |
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77 / 162 page ![]() R01DS0173EJ0120 Rev.1.20 Page 77 of 162 Oct 20, 2022 RX64M Group 2. Electrical Characteristics Figure 2.4 EXTAL External Clock Input Timing Note 1. When using a main clock, ask the manufacturer of the oscillator to evaluate its oscillation. Refer to the results of evaluation provided by the manufacturer for the oscillation stabilization time. Note 2. The number of cycles selected by the value of the MOSCWTCR.MSTS[7:0] bits determines the main clock oscillation stabilization wait time in accord with the formula below. tMAINOSCWT = [(MSTS[7:0] bits × 32) + 10] / fLOCO Figure 2.5 Main Clock Oscillation Start Timing Table 2.14 EXTAL Clock Timing Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0, VCC_USBA = AVCC_USBA = 3.0 to 3.6 V, VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V, Ta = Topr Item Symbol Min. Typ. Max. Unit Test Conditions EXTAL external clock input cycle time tEXcyc 41.66 — — ns Figure 2.4 EXTAL external clock input high pulse width tEXH 15.83 — — ns EXTAL external clock input low pulse width tEXL 15.83 — — ns EXTAL external clock rising time tEXr —— 5 ns EXTAL external clock falling time tEXf —— 5 ns Table 2.15 Main Clock Timing Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0, VCC_USBA = AVCC_USBA = 3.0 to 3.6 V, VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V, Ta = Topr Item Symbol Min. Typ. Max. Unit Test Conditions Main clock oscillation frequency fMAIN 8— 24 MHz Main clock oscillator stabilization time (crystal) tMAINOSC —— —*1 ms Figure 2.5 Main clock oscillation stabilization wait time (crystal) tMAINOSCWT —— —*2 ms tEXH tEXcyc EXTAL external clock input VCC × 0.5 tEXL tEXr tEXf Main clock oscillator output MOSCCR.MOSTP tMAINOSC Main clock tMAINOSCWT OSCOVFSR.MOOVF |
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