R5F564MFDDFB datasheet(9/162 Pages) RENESAS

9 / 162 page

R01DS0173EJ0120 Rev.1.20

Page 9 of 162

Oct 20, 2022

RX64M Group

1. Overview

MMC host interface (MMCIF)

 1 channel

 Transfer speed: Supports high-speed mode (30 MB/s) and Backward-compatible mode

(25 MB/s)

 Compliant with JEDEC STANDARD JESD84-A441 (DDR is not supported)

 Interface for Multimedia Cards (MMCs)

 Device buses: Support for 1-, 4-, and 8-bit MMC buses

 Interrupt requests: Card detection interrupt, error/timeout interrupt, normal operation

interrupt

 DMA transfer requests: CE_DATA write and CE_DATA read

 Support for card detection, boot operation, high priority interrupt (HPI)

Parallel data capture unit (PDC)

 1 channel

 Acquisition of synchronization through external 8-bit horizontal and vertical

synchronization signals

 Setting of the image size when clipping of the output for a one-frame image is required

12-bit A/D converter (S12ADC)

 12 bits × 2 units (unit 0: 8 channels; unit 1: 21 channels)

 12-bit resolution (switchable between 8, 10, and 12 bits)

 Conversion time

0.48 µs per channel (for 12-bit conversion)

0.45 µs per channel (for 10-bit conversion)

0.42 µs per channel (for 8-bit conversion)

 Operating mode

Scan mode (single scan mode, continuous scan mode, or group scan mode)

Group A priority control (only for group scan mode)

 Sample-and-hold function

Common sample-and-hold circuit included

In addition, channel-dedicated sample-and-hold function (3ch: in unit 0 only) included

 Sampling variable

Sampling time can be set up for each channel.

 Digital comparison

Method: Comparison to detect voltages above or below thresholds and window

comparison

Measurement: Comparison of two results of conversion or comparison of a value in the

comparison register and a result of conversion

 Self-diagnostic function

The self-diagnostic function internally generates three analog input voltages (unit 0:

VREFL0, VREFH0 × 1/2, VREFH0; unit 1: AVSS1, AVCC1 × 1/2, AVCC1)

 Double trigger mode (A/D conversion data duplicated)

 Detection of analog input disconnection

 Three ways to start A/D conversion

Software trigger, timer (MTU3, GPT, TMR, TPU) trigger, external trigger

 Event linking by the ELC

12-bit D/A converter (R12DA)

 2 channels

 12-bit resolution

 Output voltage: 0.2 V to AVCC1 – 0.2 V (amplifier output), 0 V to AVCC1 (direct output)

 Output via an amplifier or direct output can be selected.

 Event linking by the ELC

Temperature sensor

 1 channel

 Relative precision: ±1°C

 The voltage of the temperature is converted into a digital value by the 12-bit A/D

converter (unit 1).

Safety

Memory protection unit

(MPU)

 Protection area: Eight areas (max.) can be specified in the range from 0000 0000h to

FFFF FFFFh.

 Minimum protection unit: 16 bytes

 Reading from, writing to, and enabling the execution access can be specified for each

area.

 An address exception occurs when the detected access is not in the permitted area.

Trusted Memory (TM)

Function

 Protects against the reading of programs from blocks 8 and 9 of the code flash memory

 Instruction fetching by the CPU is the only form of access to these areas when the TM

function is enabled.

protection function

 Protects important registers from being overwritten for in case a program runs out of

control.

Table 1.1

Outline of Specifications (8/9)

Classification

Module/Function

Description

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