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RZ/G2H Datasheet(PDF) 127 Page - Renesas Technology Corp |
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RZ/G2H Datasheet(HTML) 127 Page - Renesas Technology Corp |
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127 / 169 page ![]() RZ/G Series, 2nd Generation Datasheet Section 3. Electrical Characteristics R01DS0483EJ0101 Rev.1.01 Page 127 of 169 Jun 30, 2025 Table 3.25.2 SDHI Signal Timing (High Speed mode) Conditions: VDDQVA_SDn (n = 0 to 3) = 3.3 V ± 0.2 V, GND = VSS = 0 V, Tc = −40 to +115 °C [RZ/G2H, RZ/G2M V1.3], Ta = -40 to +85 °C [RZ/G2M V3.0, RZ/G2N], Tj = -40 to +115 °C [RZ/G2M V3.0, RZ/G2N], VDDQ_SDn (n = 0, 1, 3) = 3.3V ± 0.3 V, GND = VSS = 0 V, Ta = -40 to +85 C [RZ/G2E], Tj = -40 to +115 C [RZ/G2E], CL = 40 pF Item Symbol Min. Typ. Max. Unit Figures SDCLK clock cycle time tSDCYC 20.0 — — ns Figure 3.25.2 SDCMD output data delay time tSDCMD 3.0 — 0.5 × tSDCYC + 3.0 ns SDCMD output data hold time tSDCMDOH 3.0 — — ns SDDAT output data delay time tSDDAD 3.0 — 0.5 × tSDCYC + 3.0 ns SDDAT output data hold time tSDDATOH 3.0 — — ns SDCMD input data setup time tSDCMS 3.0 — — ns SDCMD input data hold time tSDCMH 2.0 — — ns SDDAT input data setup time tSDDAS 3.0 — — ns SDDAT input data hold time tSDDAH 2.0 — — ns Figure 3.25.2 SDHI Signal Timing (High Speed mode) SDCLK SDCMD (output) SDDAT (output) SDDAT (input) SDCMD (input) tSDCYC tSDCMD tSDCMDOH tSDDAD tSDDATOH tSDCMH tSDCMS tSDDAH tSDDAS |
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