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RZ/G2H Datasheet(PDF) 129 Page - Renesas Technology Corp |
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RZ/G2H Datasheet(HTML) 129 Page - Renesas Technology Corp |
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129 / 169 page ![]() RZ/G Series, 2nd Generation Datasheet Section 3. Electrical Characteristics R01DS0483EJ0101 Rev.1.01 Page 129 of 169 Jun 30, 2025 Table 3.25.4 SDHI Signal Timing (SDR104 mode) Conditions: VDDQVA_SDn (n = 0 to 3) = 1.8 V ± 0.1 V, GND = VSS = 0 V, Tc = −20 to +115 °C [RZ/G2H, RZ/G2M V1.3], Ta = -20 to +85 °C [RZ/G2M V3.0, RZ/G2N], Tj = -20 to +115 °C [RZ/G2M V3.0, RZ/G2N] VDDQ_SDn (n = 0, 1, 3) = 1.8V ± 0.1 V, GND = VSS = 0 V, Ta = -40 to +85 C [RZ/G2E], Tj = -40 to +115 C [RZ/G2E], CL = 10 pF Item Symbol Min. Typ. Max. Unit Figures SDCLK clock cycle time tSDCYC 5.0 — — ns Figure 3.25.4 SDCMD output data delay time tSDCMD 1.30 — 3.50 ns SDDAT output data delay time tSDDAD 1.30 — 3.50 ns SDCMD input data width (for tuning) tSDICW 2.57 3.07 — ns (after tuning) 2.57 — — ns SDDAT input data width (for tuning) tSDIDW 2.57 3.07 — ns (after tuning) 2.57 — — ns Figure 3.25.4 SDHI Signal Timing (SDR104 mode) SDCLK SDCMD (output) SDDAT (output) SDDAT (input) SDCMD (input) tSDCYC tSDCMD tSDDAD tSDICW tSDIDW |
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