RZSLASHG2H datasheet(153/169 Pages) RENESAS

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RZ/G Series, 2nd Generation Datasheet

Section 3. Electrical Characteristics

R01DS0483EJ0101 Rev.1.01

Page 153 of 169

Jun 30, 2025

3.33 Debug and Trace

3.33.1 JTAG IF

Table 3.33.1 JTAG IF Signal Timing

Conditions: VDDQ18 = 1.8 V ± 0.1 V, GND = VSS = 0 V, Tc = −40 to +115 °C [RZ/G2H, RZ/G2M V1.3],

Ta = -40 to +85 °C [RZ/G2M V3.0, RZ/G2N, RZ/G2E],

Tj = -40 to +115 °C [RZ/G2M V3.0, RZ/G2N, RZ/G2E], CL = 30 pF

[RZ/G2M V1.3, RZ/G2M V3.0, RZ/G2N, and RZ/G2E]

Item

Symbol

Min.

Typ.

Max.

Unit

Figures

TCK Input clock cycle

tTCKcyc

50*

—

Figure 3.33.1

TCK Input clock pulse width (high level)

tTCKH

—

TCK Input clock pulse width (low level)

tTCKL

—

TDI/TMS setup time

tTDIS

—

Figure 3.33.2

TDI/TMS hold time

tTDIH

—

TDO output delay time

tTDO

—

[RZ/G2H]

Item

Symbol

Min.

Typ.

Max.

Unit

Figures

TCK Input clock cycle

tTCKcyc

70*

—

Figure 3.33.1

TCK Input clock pulse width (high level)

tTCKH

—

TCK Input clock pulse width (low level)

tTCKL

—

TDI/TMS setup time

tTDIS

—

Figure 3.33.2

TDI/TMS hold time

tTDIH

—

TDO output delay time

tTDO

—

Note:

The cycle is 500 ns (2 MHz) during boundary scan operation.

Figure 3.33.1 TCK Input Timing

Note: When the clock is input from the TCK pin.

tTCKH

1/2 VDDQ18

tTCKL

tTCKcyc

TCK

VIH

VIL

RZ/G2H

RZ/G2M V1.3

RZ/G2N

RZ/G2E

RZ/G2M V3.0

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