RZSLASHG2UL datasheet(39/67 Pages) RENESAS

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RZ/G2UL Group

3. Electrical Characteristics

R01DS0486EJ0110 Rev.1.10

Page 39 of 67

Jun 16, 2025

3.5.6.2

Ethernet-IF (Ether RGMII)

Table 3.33

Ethernet-IF Access Timing (Ether RGMII)

Item

Symbol

Min.

Typ.

Max.

Unit

capaci-

tance

Remarks Figures

Ether

RGMII

Data to clock output skew @

transmitter

TskewT

−500

500

8 pF

Tx RGMII

Figure

3.20

Data to clock input skew @

receiver

TskewR

1.8

2.6

8 pF

Data to clock output setup @

transmitter integrated delay

TsetupT

1.2

2.0

—

8 pF

RGMII-ID

Figure

3.21

Clock to data output hold @

transmitter integrated delay

TholdT

1.2

2.0

—

8 pF

Data to clock input setup setup

@ receiver integrated delay

TsetupR

1.0

2.0

—

8 pF

RGMII-ID

Figure

3.21

Data to clock input setup hold

@ receiver integrated delay

TholdR

1.0

2.0

—

8 pF

Clock cycle duration*1

Tcyc

7.2

8.8

8 pF

—

Duty cycle for gigabit

Duty_G

8 pF

Duty cycle for 10/100T

Duty_T

8 pF

Rise/fall time (20-80%)

Tr/Tf

—

0.75

8 pF

Note 1.

For 10 Mbps and 100 Mbps, Tcyc will scale to 400ns ±40ns and 40ns ±4ns respectively.

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