RZSLASHG2UL datasheet(24/67 Pages) RENESAS

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RZ/G2UL Group

3. Electrical Characteristics

R01DS0486EJ0110 Rev.1.10

Page 24 of 67

Jun 16, 2025

Table 3.16

DC Characteristics (14) [DDR3L Cross Point Voltage For Differential Output Signals (CK/DQS)]

Item

Symbol

Min.

Typ.

Max.

Unit

Remarks

Differential output cross point voltage

relative to 0.5 × DDR_VDDQ

VOX(CK/DQS) −0.1

—

0.1

Table 3.17

DC Characteristics (15) [USB 2.0]

Item

Symbol

Min.

Typ.

Max.

Unit

Remarks

Input levels for low/full speed

High (driven)

VIH

2.0

—

Low

VIL

—

0.8

Differential input sensitivity

VDI

0.2

—

Differential common mode range

VCM

0.8

—

2.5

Input levels for high speed

High-speed squelch detection threshold

(differential signal amplitude)

VHSSQ

100

—

150

High-speed data signaling common

mode voltage range (guideline for

receiver)

VHSCM

−50

—

500

Output levels for low/full speed

Low

VOL

0.0

—

0.3

High (driven)

VOH

2.8

—

3.6

Output signal crossover voltage

VCRS

1.3

—

2.0

Output levels for high-speed

High-speed idle level

VHSOI

−10.0

—

10.0

High-speed data signaling high

VHSOH

360

—

440

High-speed data signaling low

VHSOL

−10.0

—

10.0

Chirp J level (differential voltage)

VCHIRPJ

700

—

1100

Chirp K level (differential voltage)

VCHIRPK

−900

—

−500

Table 3.18

DC Characteristics (16) [ADC]

Item

Symbol

Min.

Typ.

Max.

Unit

Remarks

Resolution

—

Bit

Analog input channel

—

Channel

Analog input range

AIN

VSS

—

ADC_AVDD18

Differential non-linearity

DNL

—

±3.0

LSB

Integral non-linearity

INL

—

±6.0

LSB

Full-scale error

—

±10

±20

LSB

Offset error

—

±10

±20

LSB

Analog input capacitance

CIN

—

12.6

Analog input resistance

RIN

—

1780

External capacitance

CEXT

—

(*1)

External resistance

REXT

—

(*1)

Note 1.

Refer to

Figure 3.4 for Cext and Rext.

The Cext and Rext need to satisfy the sampling time.

A/D conversion time = sampling time (6T to 2800T) + 14T.

T stands for the cycle of ADIVCLK (20 MHz).

If A/D conversion is performed with the minimum conversion time, the sampling time must be 6T.

(Minimum conversion time per channel is 1 μs when A/D conversion clock ADIVCLK is 20 MHz.)

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