AT80SND1C-ROTIL datasheet(125/210 Pages) ATMEL

125 / 210 page

125

AT8xC51SND1C

4109E–8051–06/03

Registers

Table 112. MMCON0 Register

MMCON0 (S:E4h) – MMC Control Register 0

Reset Value = 0000 0000b

7654

3210

DRPTR

DTPTR

CRPTR

CTPTR

MBLOCK

DFMT

RFMT

CRCDIS

Bit

Number

Bit

Mnemonic

Description

DRPTR

Data Receive Pointer Reset Bit

Set to reset the read pointer of the data FIFO.

Clear to release the read pointer of the data FIFO.

DTPTR

Data Transmit Pointer Reset Bit

Set to reset the write pointer of the data FIFO.

Clear to release the write pointer of the data FIFO.

CRPTR

Command Receive Pointer Reset Bit

Set to reset the read pointer of the receive command FIFO.

Clear to release the read pointer of the receive command FIFO.

CTPTR

Command Transmit Pointer Reset Bit

Set to reset the write pointer of the transmit command FIFO.

Clear to release the read pointer of the transmit command FIFO.

3MBLOCK

Multi-block Enable Bit

Set to select multi-block data format.

Clear to select single block data format.

2DFMT

Data Format Bit

Set to select the block-oriented data format.

Clear to select the stream data format.

1RFMT

Response Format Bit

Set to select the 48-bit response format.

Clear to select the 136-bit response format.

CRCDIS

CRC7 Disable Bit

Set to disable the CRC7 computation when receiving a response.

Clear to enable the CRC7 computation when receiving a response.

AT80SND1C-ROTIL Datasheet(PDF) 125 Page - ATMEL Corporation

AT80SND1C-ROTIL Datasheet(HTML) 125 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL