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M37274EFSP Datasheet(PDF) 77 Page - Renesas Technology Corp |
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M37274EFSP Datasheet(HTML) 77 Page - Renesas Technology Corp |
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77 / 148 page ![]() 7 76 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER M37274EFSP PRELIMINARY Notice: This is not a final specification. Some paramentic limits are subject to change. MITSUBISHI MICROCOMPUTERS Fig. 77. Clock Control Register b7 b6 b5 b4 b3 b2 b1 b0 Clock source control register (CS) [Address 0216 16] B Name Functions After reset RW Clock Source Control Register 0 CC mode clock selection bit (CS0) 0R W 1, 2 OSD mode clock selection bits (CS1, CS2) 0: Data slicer clock 1: OSC1 clock 0R W 3 EXOSD mode clock selection bit (CS3) 0: Data slicer clock 1: OSC1 clock 0R W 4, 5 0 W 6 Pre-divide ratio of layer 2 selection bit (CS6) 0: ! 1 1: ! 2 0 RW 0 RW 0 0: Data slicer clock 0 1: OSC1 clock 1 0: Main clock (See note 1) 1 1: Do not set b2 b1 Test bit (See note 3) R OSD oscillating mode selection bits (CS4, CS5) 0 0: 32 kHz oscillating mode 0 1: Input ports P6 3, P64 (See note 2) 1 0: LC oscillating mode 1 1: Ceramic • quartz-crystal oscillating mode b5 b4 Notes 1: When setting “102,” main clock is set as a clock in the CC mode and EXOSD mode regardless of bits 0, 3. 2: When selecting input ports P6 3 and P64, set bit 7 at address 00C716 to “0.” 3: Be sure to set bit 7 to “0” for program of the mask and the EPROM versions. For the emulator MCU version (M37274ERSS), be sure to set bit 7 to “1” when using the data slicer clock for software debugging. |
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