R5F3640DDFB datasheet(68/398 Pages) RENESAS

68 / 398 page

REJ09B0392-0064 Rev.0.64

Oct 12, 2007

Page 47 of 373

Under development

Preliminary Specification

Specification in this preliminary version is subject to change.

M16C/64 Group

7. Processor Mode

Processor Mode

7.1

Types of Processor Mode

Three processor modes are available to choose from: single-chip mode, memory expansion mode, and

microprocessor mode. Table 7.1 shows the Features of Processor Modes.

NOTE:

Refer to 8. “Bus” for details.

7.2

Setting Processor Modes

Processor mode is set by using the CNVSS pin and bits PM01 to PM00 in the PM0 register.

Table 7.2 shows the Processor Mode After Hardware Reset. Table 7.3 shows Bits PM01 to PM00 Set

Values and Processor Modes

NOTES:

If the microcomputer is reset in hardware by applying VCC1 to the CNVSS pin (hardware reset 1 or

brown-out reset), the internal ROM cannot be accessed regardless of the status of bits PM10 to

PM00.

The multiplexed bus cannot be assigned to the entire

CS space.

Rewriting bits PM01 to PM00 places the microcomputer in the corresponding processor mode regardless

of whether the input level on the CNVSS pin is “H” or “L”. Note, however, that bits PM01 to PM00 cannot

be rewritten to 01b (memory expansion mode) or 11b (microprocessor mode) at the same time bits PM07

to PM02 are rewritten. Note also that these bits cannot be rewritten to enter microprocessor mode in the

internal ROM, nor can they be rewritten to exit microprocessor mode in areas overlapping the internal

ROM.

If the microcomputer is reset in hardware by applying VCC1 to the CNVSS pin (hardware reset 1 or

brown-out reset), the internal ROM cannot be accessed regardless of bits PM01 to PM00.

Figures 7.1 to 7.3 show the PM0 Register and PM1 Register. Figure 7.4 show the Memory Map in Single-

Chip Mode.

Table 7.1

Features of Processor Modes

Processor Modes

Access Space

Pins Which Are Assigned I/O Ports

Single-chip mode

SFR, internal RAM, internal ROM

All pins are I/O ports or peripheral function I/

O pins

Memory expansion

mode

SFR, internal RAM, internal ROM,

external area (1)

Some pins serve as bus control pins (1)

Microprocessor mode

SFR, internal RAM, external area (1) Some pins serve as bus control pins (1)

Table 7.2

Processor Mode After Hardware Reset

CNVSS Pin Input Level

Processor Modes

VSS

Single-chip mode

VCC1 (1, 2)

Microprocessor mode

Table 7.3

Bits PM01 to PM00 Set Values and Processor Modes

Bits PM01 to PM00

Processor Modes

00b

Single-chip mode

01b

Memory expansion mode

10b

Do not set

11b

Microprocessor mode

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