R5F3640DDFB datasheet(32/398 Pages) RENESAS

32 / 398 page

REJ09B0392-0064 Rev.0.64

Oct 12, 2007

Page 11 of 373

M16C/64 Group

1. Overview

Under development

Preliminary Specification

Specification in this preliminary version is subject to change.

1.6

Pin Functions

NOTE:

VCC1 is hereinafter referred to as VCC unless otherwise noted.

Table 1.6

Pin Functions (1)

Signal Name

Pin Name

I/O

Power Supply

Description

Power supply

input

VCC1

VCC2

VSS

Apply 2.7 to 5.5 V to pins VCC1 and VCC2 (VCC1

=VCC2)

and 0 V to the VSS pin (1)

Analog power

supply input

AVCC

AVSS

VCC1

Apply the power supply for the A/D converter. Connect the

AVCC pin to VCC1. Connect the AVSS pin to VSS.

Reset input

RESET

VCC1

Low active input pin. Driving this pin Low resets the MCU.

CNVSS

VCC1

Input pin to switch processor mode. To start up in single-chip

mode after a reset, connect the CNVSS pin to VSS via

resister. To start up in microprocessor mode, connect the

CNVSS pin to VSS1.

External data

bus width

select input

BYTE

VCC1

Input pin to select the data bus of the external memory area.

The data bus is 16-bit when it is Low and 8-bit when it is

High. This pin must be fixed either High or Low. Connect the

BYTE pin to VSS in single-chip mode

Bus control

pins

D0 to D7

I/O

VCC2

Inputs or outputs data (D0 to D7) while accessing an exter-

nal memory area with separate bus

D8 to D15

I/O

VCC2

Inputs or outputs data (D8 to D15) while accessing an exter-

nal memory area with 16-bit separate bus

A0 to A19

VCC2

Outputs address bits A0 to A19

A0/D0 to

A7/D7

I/O

VCC2

Inputs or outputs data (D0 to D7) and outputs address bits

(A0 to A7) by timesharing, while accessing an external mem-

ory area with 8-bit multiplexed bus

A1/D0 to

A8/D7

I/O

VCC2

Inputs or outputs data (D0 to D7) and outputs address bits

(A1 to A8) by timesharing, while accessing an external mem-

ory area with 16-bit multiplexed bus

CS0 to CS3

VCC2

Outputs chip-select signals

CS0 to CS3 to specify an exter-

nal memory area

WRL/WR

WRH/BHE

VCC2

Low active output pins. Outputs

WRL, WRH, (WR, BHE), RD

signals.

WRL and WRH can be switched with or BHE and

WR can be selected by a program.

WRL, WRH and RD selected

If the external data bus is 16-bit, data is written to an even

address in external memory area when

WRL is driven low.

Data is written to an odd address when

WRH is driven low.

Data is read when

RD is driven low.

WR, BHE and RD are selected

Data is written to external memory area when

WR is driven

low. Data in external memory area is read when

RD is driven

low. An odd address is accessed when

BHE is driven low.

Select

WR, BHE, and RD for external 8-bit data bus

ALE

VCC2

Output ALE signal to latch address.

HOLD

VCC2

Low active input pin. The MCU is placed in hold state while

the

HOLD pin is driven low.

HLDA

VCC2

Low active output pin. In a hold state,

HLDA outputs a low-

level signal.

RDY

VCC2

Low active input pin. The MCU is placed in wait state while

the

RDY pin is driven low.

Power supply: VCC2 is used to supply power to external bus related pins.

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