R8C13 datasheet(85/224 Pages) RENESAS

85 / 224 page

Rev.1.20

Jan 27, 2006

page 74 of 205

REJ09B0111-0120

R8C/13 Group

12.1.2 Pulse Output Mode

In this mode, the timer counts an internally generated count source, and outputs from the CNTR0 pin

a pulse whose polarity is inverted each time the timer underflows (See “Table 12.3 Pulse Output mode

Specifications”). Figure 12.5 shows TXMR register in pulse output mode.

Item

Specification

Count source

f1, f2, f8, f32

Count operation

• Down-count

• When the timer underflows, the contents in the reload register is reloaded and the count

is contiuned.

Divide ratio

1/(n+1)(m+1)

n: set value of PREX register, m: set value of TX register

Count start condition

Write “1” (count start) to TXS bit in TXMR register

Count stop condition

Write “0” (count stop) to TXS bit in TXMR register

Interrupt request

• When Timer X underflows [Timer X interruption]

generation timing

INT1/CNTR0 pin function

Pulse output

CNTR0 pin function

Programmable I/O port or inverted output of CNTR0

Read from timer

Count value can be read by reading TX register.

Same applies to PREX register.

Write to timer

Value written to TX register is written to both reload register and counter.

Same applies to PREX register.

Select function

_____

• INT1/CNTR0 polarity switching function

Polarity level at starting of pulse output can be selected with R0EDG bit(1)

• Inverted pulse output function

___________

Inverted pulse of CNTR0 output polarity can be output from the CNTR0 pin

(selected by TXOCNT bit)

NOTES:

1. The level of the output pulse becomes the level when the pulse output starts when the TX register is written to.

Table 12.3 Pulse Output Mode Specifications

Figure 12.5 TXMR Register in Pulse Output Mode

Timer X mode register

SymbolAddressAfter reset

TXMR008B16

0016

Bit name

Function

Bit symbol

b7 b6 b5 b4 b3 b2 b1 b0

0 1 : Pulse output mode

b1 b0

TXMOD2

TXS

TXMOD1

R0EDG

TXMOD0

TXOCNT

Operation mode

select bit 0, 1

0: CNTR0 output starts at "H"

1: CNTR0 output starts at "L"

Timer X count

start flag

0 : Stops counting

1 : Starts counting

P30/CNTR0

select bit

0 : Port P30

1 : CNTR0 output

Set to "0" in pulse output mode

0 1

TXEDG

TXUND

INT1/CNTR0 polarity

switching bit(1)

Set to "0" in pulse output mode

NOTES:

1. The IR bit in the INT1IC register may be set to “1” (interrupt requested) when the R0EDG bit is rewritten.

Refer to the paragraph 19.2.5 “Changing Interrupt Factor” in the Usage Notes Reference Book.

12.1 Timer (Timer X)

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