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7721 Datasheet(PDF) 166 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 166 Page - Renesas Technology Corp |
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166 / 577 page  TIMER A 7721 Group User’s Manual 8–47 8.6 Pulse width modulation (PWM) mode [Precautions for PWM mode] 1. If the count start bit is cleared to “0” while outputting PWM pulses, the counter stops counting. When the TAjOUT pin was outputting “H” level at that time, the output level becomes “L” and the timer Aj interrupt request bit is set to “1.” When the TAjOUT pin was outputting “L” level, the output level does not change and a timer Aj interrupt request does not occur. 2. When the timer’s operating mode is set by one of the following procedures, the timer Aj interrupt request bit is set to “1.” qWhen the PWM mode is selected after reset qWhen the operating mode is switched from the timer mode to the PWM mode qWhen the operating mode is switched from the event counter mode to the PWM mode Accordingly, when using the timer Aj interrupt (interrupt request bit), be sure to clear the timer Aj interrupt request bit to “0” after the above setting. |
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