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EXAMPLE – WRITING TO THE TMDS261

EXAMPLE – READING FROM THE TMDS261

TMDS261

SLLS953 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com

Table 7. TMDS261 Slave Address

FIXED ADDRESS

READ/WRITE BIT

Bit 7 (MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (R/W)

1/0

The proper way to write to the TMDS261 is illustrated as follows:

An I2C master initiates a write operation to the TMDS261 by generating a start condition (S) followed by the

TMDS261 I2C address (as shown following, in MSB-first bit order, followed by a 0 to indicate a write cycle. After

receiving an acknowledge from the TMDS261, the master presents the subaddress (sink port) to be written,

consisting of one byte of data, MSB-first. The TMDS261 acknowledges the byte after completion of the transfer.

Finally, the master presents the data to be written to the register (sink port), and the TMDS261 acknowledges the

byte. The master can continue presenting data to be written after TMDS261 acknowledges the previous byte

(steps 6, 7). After the last byte to be written has been acknowledged by TMDS261, the I2C master then

terminates the write operation by generating a stop condition (P).

Step 1

I2C start (master)

Step 2

I2C general address (master)

Step 3

I2C acknowledge (slave)

Step 4

I2C write sink logic address (master)

Addr

Step 5

I2C acknowledge (slave)

Step 6

I2C write data (master)

Data

Data is the register address or register data to be written

Step 7

I2C acknowledge (slave)

Step 8

I2C stop (master)

An example of the proper bit control for selecting port 2 is:

Step 4: 0000 0001

Step 6: 1001 0000

The read operation consists of two phases. The first phase is the address phase. In this phase, an I2C master

initiates a write operation to the TMDS261 by generating a start condition (S) followed by the TMDS261 I2C

address, in MSB-first bit order, followed by a 0 to indicate a write cycle. After receiving acknowledges from the

TMDS261, the master presents the subaddress of the register to be read. After the cycle is acknowledged (A),

the master may optionally terminate the cycle by generating a stop condition (P).

The second phase is the data phase. In this phase, an I2C master initiates a read operation to the TMDS261 by

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