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PCM3168APAPR Datasheet(PDF) 53 Page - Texas Instruments |
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PCM3168APAPR Datasheet(HTML) 53 Page - Texas Instruments |
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53 / 66 page ![]() PCM3168A PCM3168A-Q1 www.ti.com ......................................................................................................................................................................................... SBAS452 – SEPTEMBER 2008 DEC HEX B7 B6 B5 B4 B3 B2 B1 B0 87 57 ATMDAD ATSPAD — — — — — OVFP ATMDAD ADC Attenuation mode This bit controls the ADC attenuation mode. ATAD1[7:0] to ATAD6[7:0] are simply used for ATMDAD = 0, and ATAD0[7:0] + ATAD1[7:0] to ATAD0[7:0] + ATAD6[7:0] in decibel number are used for ATMDAD = 1. Default value: 0. ATMDAD ADC Attenuation mode 0 Each channel with independent data (default) All channels with preset (independent) data + master (common) data in decibel 1 number ATSPAD ADC Attenuation speed This bit controls the ADC attenuation Speed, N × 2048/fS for ATSPAD = 0 and N × 4096/fS for ATSPAD = 1. N is automatically selected according to the ADC sampling mode, SRAD: N = 1 for single and N = 2 for dual rate. Default value: 0. ATSPAD ADC Attenuation speed 0 N × 2048/fS (default) 1 N × 4096/fS OVFP ADC Overflow flag polarity select This bit controls the polarity of the overflow flag pin. Default value: 0. OVFP ADC Overflow flag polarity select 0 High for overflow detect (default) 1 Low for overflow detect DEC HEX B7 B6 B5 B4 B3 B2 B1 B0 88 58 ATAD07 ATAD06 ATAD05 ATAD04 ATAD03 ATAD02 ATAD01 ATAD00 89 59 ATAD17 ATAD16 ATAD15 ATAD14 ATAD13 ATAD12 ATAD11 ATAD10 90 5A ATAD27 ATAD26 ATAD25 ATAD24 ATAD23 ATAD22 ATAD21 ATAD20 91 5B ATAD37 ATAD36 ATAD35 ATAD34 ATAD33 ATAD32 ATAD31 ATAD30 92 5C ATAD47 ATAD46 ATAD45 ATAD44 ATAD43 ATAD42 ATAD41 ATAD40 93 5D ATAD57 ATAD56 ATAD55 ATAD54 ATAD53 ATAD52 ATAD51 ATAD50 94 5E ATAD67 ATAD66 ATAD65 ATAD64 ATAD63 ATAD62 ATAD61 ATAD60 Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 53 Product Folder Link(s): PCM3168A PCM3168A-Q1 |
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