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PCM3168APAPR Datasheet(PDF) 21 Page - Texas Instruments |
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PCM3168APAPR Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 66 page ![]() 0 20 40 60 80 100 120 140 160 180 200 - - - - - - - - - - 2.0 NormalizedFrequency(f ) S 0 0.5 1.0 1.5 DSM_Dual DSM_Single DF_Single DF_Dual 0 20 40 60 80 100 120 140 160 180 200 - - - - - - - - - - 2.0 NormalizedFrequency(f ) S 0 0.5 1.0 1.5 DSM_Dual DSM_Single DSM_Quad DF_Dual DF_Single DF_Quad PCM3168A PCM3168A-Q1 www.ti.com ......................................................................................................................................................................................... SBAS452 – SEPTEMBER 2008 oversampling frequency of x64; this mode is supported for sampling frequencies less than 100 kHz. In quad rate mode, the DAC operates at an oversampling frequency of x32. The sampling mode is automatically selected according to the ratio of system clock frequency and sampling frequency by default (for example, single rate for 512 fS and 768 fS, dual rate for 256 fS and 384 fS, and quad rate for 128 fS and 192 fS), but manual selection is also possible for specified combinations through the serial mode control resistor. Table 5 and Figure 31 show the relation between the oversampling rate (OSR) of the ΔΣ modulator, noise-free shaped bandwidth, and each sampling mode setting for ADC operation. Table 6 and Figure 32 describe the relation between the oversampling rate of the digital filter and ΔΣ modulator, noise-free shaped bandwidth, and each sampling mode setting for DAC operation. Table 5. ADC Modulator OSR and Noise-Free Shaped Bandwidthfor Each Sampling Mode NOISE-FREE SHAPED BANDWIDTH (kHz) SAMPLING MODE SYSTEM CLOCK RATE REGISTER SETTING (fS) fS = 48 kHz fS = 96 kHz MODULATOR OSR 512, 768 40 N/A x128 Auto 256, 384 20 40 x64 512, 768 40 N/A x128 Single 256, 384 40 N/A x128 Dual 256, 384 20 40 x64 Table 6. DAC Digital Filter OSR, Modulator OSR, and Noise-Free Shaped Bandwidth for Each Sampling Mode NOISE-FREE SHAPED BANDWIDTH SAMPLING MODE SYSTEM CLOCK fS = 48 fS = 96 fS = 192 REGISTER SETTING RATE (fS) kHz kHz kHz DIGITAL FILTER OSR MODULATOR OSR 512, 768 40 N/A N/A x8 x128 Auto 256, 384 20 40 N/A x8 x64 128, 192(1)(2) 10 20 40 x4 x32 512, 768 40 N/A N/A x8 x128 Single 256, 384 40 N/A N/A x8 x128 128, 192(1)(2) 20 N/A N/A x4 x64 256, 384 20 40 N/A x8 x64 Dual 128, 192(1)(2) 20 40 N/A x4 x64 Quad 128, 192(1)(2) 10 20 40 x4 x32 (1) Supported only by DAC operation. (2) Quad mode filter characteristic is applied. Figure 31. ADC ΔΣ Modulator and Digital Filter Figure 32. DAC ΔΣ Modulator and Digital Filter Characteristic Characteristic Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Link(s): PCM3168A PCM3168A-Q1 |
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