ATA5423-PLSW datasheet(50/100 Pages) ATMEL

50 / 100 page

4841D–WIRE–10/07

ATA5423/ATA5425/ATA5428/ATA5429

8.4

Command: Write Control Register

The control registers can be written individually or successively. An echo of the command and

the data bytes are provided for the microcontroller on pin SDO_TMDO.

Figure 8-4.

Write Control Register

8.5

Command: OFF Command

If AVCC_EN in control register 1 is “0”, the input level on pin PWR_ON is low and on the key

inputs Tn is high, then the OFF command sets the transceiver in the OFF mode.

Figure 8-5.

OFF Command

8.6

Command: Delete IRQ

The delete IRQ command sets pin IRQ to low.

Figure 8-6.

Delete IRQ

8.7

Command Structure

The three most significant bits of the command (bit 5 to bit 7) indicate the command type. Bit 0 to

bit 4 describe the target address when reading or writing a control or status register. In all other

commands bit 0 to bit 4 have no effect and should be set to “0” for compatibility with future

products.

SCK

SDO_TMDO

SDI_TMDI

Write Control Register X

Data Control Register X

No. Bytes in the TX/RX Data Buffer

Command: Write Control Register X

MSB

LSB

MSB

Command: Write Control Register Y

Data Control Register X

SCK

SDO_TMDO

SDI_TMDI

No. Bytes in the TX/RX Data Buffer

Command: OFF Command

LSB

MSB

SCK

SDO_TMDO

SDI_TMDI

No. Bytes in the TX/RX Data Buffer

Command: Delete IRQ

LSB

MSB

ATA5423-PLSW Datasheet(PDF) 50 Page - ATMEL Corporation

ATA5423-PLSW Datasheet(HTML) 50 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Datasheet Download

Link URL