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STM32W108HB Datasheet(PDF) 65 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 65 Page - STMicroelectronics |
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65 / 179 page  STM32W108CB, STM32W108HB Serial interfaces Doc ID 16252 Rev 2 65/179 7.2.3 Serial controller interrupt configuration register (INT_SCxCFG) Address offset: 0xA848 (INT_SC1CFG) and 0xA84C (INT_SC2CFG) Reset value: 0x0000 0000 [3] INT_SCRXOVF: Receive buffer overrun interrupt pending. [2] INT_SCTXIDLE: Transmitter idle interrupt pending. [1] INT_SCTXFREE: Transmit buffer free interrupt pending. [0] INT_SCRXVAL: Receive buffer has data interrupt pending. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 INT_S C1PA RERR INT_S C1FR MERR INT_S CTXU LDB INT_S CTXU LDA INT_S CRXU LDB INT_S CRXU LDA INT_S CNAK INT_S CCMD FIN INT_S CTXFI N INT_SC RXFIN INT_S CTXU ND INT_S CRXO VF INT_S CTXID LE INT_S CTXFR EE INT_S CRXVA L rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [14] INT_SC1PARERR: Parity error received (UART) interrupt enable. [13] INT_SC1FRMERR: Frame error received (UART) interrupt enable. [12] INT_SCTXULDB: DMA transmit buffer B unloaded interrupt enable. [11] INT_SCTXULDA: DMA transmit buffer A unloaded interrupt enable. [10] INT_SCRXULDB: DMA receive buffer B unloaded interrupt enable. [9] INT_SCRXULDA: DMA receive buffer A unloaded interrupt enable. [8] INT_SCNAK: NACK received (TWI) interrupt enable. [7] INT_SCCMDFIN: START/STOP command complete (TWI) interrupt enable. [6] INT_SCTXFIN: Transmit operation complete (TWI) interrupt enable. [5] INT_SCRXFIN: Receive operation complete (TWI) interrupt enable. [4] INT_SCTXUND: Transmit buffer underrun interrupt enable. [3] INT_SCRXOVF: Receive buffer overrun interrupt enable. [2] INT_SCTXIDLE: Transmitter idle interrupt enable. [1] INT_SCTXFREE: Transmit buffer free interrupt enable. [0] INT_SCRXVAL: Receive buffer has data interrupt enable. |
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