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STM32W108HB Datasheet(PDF) 69 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 69 Page - STMicroelectronics |
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69 / 179 page  STM32W108CB, STM32W108HB Serial interfaces Doc ID 16252 Rev 2 69/179 7.5 Two wire (TWI) serial interfaces 7.5.1 TWI status register (SCx_TWISTAT) Address offset: 0xC844 (SC1_TWISTAT) and 0xC044 (SC2_TWISTAT) Reset value: 0x0000 0000 7.5.2 TWI control 1 register (SCx_TWICTRL1) Address offset: 0xC84C (SC1_TWICTRL1) and 0xC04C (SC2_TWICTRL1) Reset value: 0x0000 0000 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SC_T WICM DFIN SC_T WIRXF IN SC_T WITXF IN SC_T WIRXN AK rw rw rw rw rw rw rw rw rw rw rw rw r r r r [3] SC_TWICMDFIN: This bit is set when a START or STOP command completes. It clears on the next TWI bus activity. [2] SC_TWIRXFIN: This bit is set when a byte is received. It clears on the next TWI bus activity. [1] SC_TWITXFIN: This bit is set when a byte is transmitted. It clears on the next TWI bus activity. [0] SC_TWIRXNAK: This bit is set when a NACK is received from the slave. It clears on the next TWI bus activity. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SC_T WISTO P SC_T WISTA RT SC_T WISEN D SC_T WIREC V rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [3] SC_TWISTOP: Setting this bit sends the STOP command. It clears when the command completes. [2] SC_TWISTART: Setting this bit sends the START or repeated START command. It clears when the command completes. [1] SC_TWISEND: Setting this bit transmits a byte. It clears when the command completes. [0] SC_TWIRECV: Setting this bit receives a byte. It clears when the command completes. |
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