STM32W108HB datasheet(36/179 Pages) STMICROELECTRONICS

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System modules

STM32W108CB, STM32W108HB

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Doc ID 16252 Rev 2

The Power Management module allows a special emulated deep sleep state that retains

memory and core domain power while in deep sleep.

5.2.2

Reset recording

The STM32W108 records the last reset condition that generated a restart to the system.

The reset conditions recorded are:

●

POWER_HV

Always-on domain power supply failure

●

POWER_LV

Core or memory domain power supply failure

●

RSTB

NRST pin asserted

●

W_DOG

Watchdog timer expired

●

SW_RST

Software reset by SYSERSETREQ from ARM® Cortex-M3

CPU

●

WAKE_UP_DSLEEP

Wake-up from deep sleep

●

OPT_BYTE_FAIL

Error check failed when reading option bytes from Flash

memory

The Reset event source register (RESET_EVENT) is used to read back the last reset event.

All bits are mutually exclusive except the OPT_BYTE_FAIL bit which preserves the original

reset event when set.

Note:

While CPU Lockup is marked as a reset condition in software, CPU Lockup is not

specifically a reset event. CPU Lockup is set to indicate that the CPU entered an

unrecoverable exception. Execution stops but a reset is not applied. This is so that a

debugger can interpret the cause of the error. We recommend that in a live application (i.e.

no debugger attached) the watchdog be enabled by default so that the STM32W108 can be

restarted.

5.2.3

Reset generation

The Reset Generation module responds to reset sources and generates the following reset

signals:

●

PORESET

Reset of the ARM® Cortex-M3 CPU and ARM® Cortex-M3

System Debug components (Flash Patch and Breakpoint,

Data Watchpoint and Trace, Instrumentation Trace Macrocell,

Nested Vectored Interrupt Controller). ARM defines

PORESET as the region that is reset when power is applied.

●

SYSRESET

Reset of the ARM® Cortex-M3 CPU without resetting the

Core Debug and System Debug components, so that a live

system can be reset without disturbing the debug

configuration.

●

DAPRESET

Reset to the SWJ's AHB Access Port (AHB-AP).

●

PRESETHV

Peripheral reset for always-on power domain, for peripherals

that are required to retain their configuration across a deep

sleep cycle.

●

PRESETLV

Peripheral reset for core power domain, for peripherals that

are not required to retain their configuration across a deep

sleep cycle.

STM32W108HB Datasheet(PDF) 36 Page - STMicroelectronics

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