| Electronic Components Datasheet Search |
|
STM32W108HB Datasheet(PDF) 10 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32W108HB Datasheet(HTML) 10 Page - STMicroelectronics |
|
10 / 179 page ![]() Description STM32W108CB, STM32W108HB 10/179 Doc ID 16252 Rev 2 1.1 Development tools The STM32W108 utilizes standard Serial Wire and JTAG interfaces for powerful software debugging and programming of the ARM® Cortex™-M3 core. The STM32W108 integrates the standard ARM system debug components: Flash Patch and Breakpoint (FPB), Data Watchpoint and Trace (DWT), and Instrumentation Trace Macrocell (DWT). Figure 1. STM32W108 block diagram 1.2 Overview 1.2.1 ARM® CortexTM-M3 core with embedded Flash and SRAM The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced system response to interrupts. The ARM Cortex™-M3 32-bit RISC processor features exceptional code-efficiency, delivering the high-performance expected from an ARM core in the memory size usually associated with 8- and 16-bit devices. The ARM® Cortex-M3 uses an advanced 32-bit modified Harvard architecture processor that has separate internal program and data buses, but presents a unified program and data address space to software. The word width is 32 bits for both the program and data sides. The ARM® Cortex-M3 allows unaligned word and half-word data accesses to support efficiently-packed data structures. The ARM® Cortex-M3 clock speed is configurable to 6 MHz, 12 MHz, or 24 MHz. For normal operation 12 MHz is preferred over 24 MHz due to its lower power consumption. The Packet sniffer ADC RF_P,N Program Flash 128 kBytes Data SRAM 8 kBytes HF crystal OSC LF crystal OSC General Purpose ADC Serial Wire and JTAG debug Internal LF RC-OSC GPIO multiplexor swtich Chip manage r Regulator Bias 2 nd level Interrupt controller RF_TX_ALT_P,N OSCA OSCB PA[7:0], PB[7:0], PC[7:0] Encryption acclerator IF Always Powered Domain ARM CORTEX-M3® CPU with NVIC and MPU VREG_OUT Watchdog PA select LNA PA PA DAC MAC + Baseband Sleep timer BIAS_R POR nRESET General purpose timers GPIO registers UART/ SPI/TWI SYNTH Internal HF RC-OSC TX_ACTIVE SWCLK, JTCK Calibration ADC Packet Trace CPU debug TPIU/ITM/ FPB/DWT Ai15250 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |