68HC05P9A datasheet(57/90 Pages) FREESCALE

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GENERAL RELEASE SPECIFICATION

ANALOG-TO-DIGITAL (A/D) CONVERTER

Rev. 2.0

10-3

CH1–CH0 — Channel Select

These bits select one of the four A/D inputs (AN3, AN2, AN1, or AN0) for

conversion. Refer to Table 10-1).

To prevent excess power dissipation, do not use a port C pin as an analog input

and a digital input at the same time.

Using one of the port C pins as the A/D converter input does not affect the ability

to use the remaining port C pins as digital inputs.

Performing a digital read of a port C pin that is selected as an analog input returns

a logical zero.

10.3

A/D Data Register (ADDR)

The A/D data register is a read-only register that contains the result of the most

recent A/D conversion. This register is updated each time the conversion

complete ﬂag (CCF) is set in the A/D status and control register.

10.4

A/D Converter During Wait Mode

The A/D converter continues to operate normally while the MCU is in wait mode. If

the A/D converter is not being used, clear the ADON and ADRC bits in the A/D

status and control register to decrease power consumption during wait mode.

Table 10-1. A/D Input Selection

CH1:CH0

Input Selected

AN0, Port C Bit 6

AN1, Port C Bit 5

AN2, Port C Bit 4

AN3, Port C Bit 3

$001D

Bit 7

654321

Bit 0

RESET:

A/D DATA REGISTER NOT AFFECTED BY RESET

Figure 10-2. A/D Data Register (ADDR)

Freescale Semiconductor, Inc.

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68HC05P9A Datasheet(PDF) 57 Page - Freescale Semiconductor, Inc