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68HC705SB7 Datasheet(PDF) 84 Page - Freescale Semiconductor, Inc

Part # 68HC705SB7
Description  SPECIFICATION (General Release)
PDF  170 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

68HC705SB7 Datasheet(HTML) 84 Page - Freescale Semiconductor, Inc

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GENERAL RELEASE SPECIFICATION
August 27, 1998
MOTOROLA
SM-BUS
MC68HC05SB7
12-6
REV 2.1
12.5.1 SM-Bus Address Register (SMADR)
SMAD1-SMAD7 are the slave address bits of the SM-Bus module.
12.5.2 SM-Bus Frequency Divider Register (SMFDR)
FD0-FD4 are used for clock rate selection. The serial bit clock frequency is equal
to the CPU clock divided by the divider shown in Table 12-1.
For a 4MHz external crystal operation (2MHz internal operating frequency), the
serial bit clock frequency of the SM-Bus ranges from 460Hz to 90909Hz. After
POR the clock rate is set to 90909Hz.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
SMADR
R
SMAD7
SMAD6
SMAD5
SMAD4
SMAD3
SMAD2
SMAD1
$0020
W
reset:
0000000
U
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
SMFDR
R
FD4
FD3
FD2
FD1
FD0
$0021
W
reset:
U
U
U
00000
Table 12-1. SM-Bus Clock Prescaler
FD4, FD3, FD2, FD1, FD0
DIVIDER
FD4,FD3, FD2, FD1, FD0
DIVIDER
00000
22
10000
352
00001
24
10001
384
00010
28
10010
448
00011
34
10011
544
00100
44
10100
704
00101
48
10101
768
00110
56
10110
896
00111
68
10111
1088
01000
88
11000
1408
01001
96
11001
1536
01010
112
11010
1792
01011
136
11011
2176
01100
176
11100
2816
01101
192
11101
3072
01110
224
11110
3584
01111
272
11111
4352



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