MAC7200 datasheet(287/976 Pages) FREESCALE

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The SPP DMA Controller Module (SPP_DMA2)

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

209

12.2.4.1

12.2.4.1.1

DMA Control Register (DMACR)

The 32-bit DMACR defines the basic operating configuration of the DMA.

The DMA arbitrates channel service requests in groups of 16 channels. The 16 channel configuration has

only one group (0). Group 0 contains channels 15-0.

Arbitration within the group can be configured to use either a fixed priority or a round robin. In fixed

priority arbitration, the highest priority channel requesting service is selected to execute. The priorities are

assigned by the channel priority registers (see section Section 12.2.4.1.15, “DMA Channel n Priority

(DCHPRIn), n = 0,..., {15,31,63}).” In round robin arbitration mode, the channel priorities are ignored and

the channels are cycled through without regard to priority.

See Figure 12-2 and Table 12-5 for the DMACR definition.

0x0124

DMA Channel 36

Priority (DCHPRI36)

DMA Channel 37

Priority (DCHPRI37)

DMA Channel 38

Priority (DCHPRI38)

DMA Channel 39

Priority (DCHPRI39)

0x0128

DMA Channel 40

Priority (DCHPRI40)

DMA Channel 41

Priority (DCHPRI41)

DMA Channel 42

Priority (DCHPRI42)

DMA Channel 43

Priority (DCHPRI43)

0x012c

DMA Channel 44

Priority (DCHPRI44)

DMA Channel 45

Priority (DCHPRI45)

DMA Channel 46

Priority (DCHPRI46)

DMA Channel 47

Priority (DCHPRI47)

0x0130

DMA Channel 48

Priority (DCHPRI48)

DMA Channel 49

Priority (DCHPRI49)

DMA Channel 50

Priority (DCHPRI50)

DMA Channel 51

Priority (DCHPRI51)

0x0134

DMA Channel 52

Priority (DCHPRI52)

DMA Channel 53

Priority (DCHPRI53)

DMA Channel 54

Priority (DCHPRI54)

DMA Channel 55

Priority (DCHPRI55)

0x0138

DMA Channel 56

Priority (DCHPRI56)

DMA Channel 57

Priority (DCHPRI57)

DMA Channel 58

Priority (DCHPRI58)

DMA Channel 59

Priority (DCHPRI59)

0x013c

DMA Channel 60

Priority (DCHPRI60)

DMA Channel 61

Priority (DCHPRI61)

DMA Channel 62

Priority (DCHPRI62)

DMA Channel 63

Priority (DCHPRI63)

0x0200-0x0ffc

Reserved

0x1000-0x11fc

TCD00-TCD15

0x1200-0x13fc

TCD16-TCD31

0x1400-0x15fc

TCD32-TCD47

0x1600-0x17fc

TCD48-TCD63

Table 12-4. DMA 32-bit Memory Map (Continued)

DMA Offset

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