HT66F016 datasheet(55/116 Pages) HOLTEK

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HT66F016/HT66F017/HT68F016/HT68F017

Rev. 1.00

May 14, 2012

· TM0C0 Register

Bit

76543210

Name

T0PAU

T0CK2

T0CK1

T0CK0

T0ON

¾¾¾

R/W

¾¾¾

POR

00000

¾¾¾

Bit 7

T0PAU: TM0 counter pause control

0: run

1: pause

The counter can be paused by setting this bit high. Clearing the bit to zero restores normal

counter operation. When in a Pause condition the TM will remain powered up and continue to

consume power. The counter will retain its residual value when this bit changes from low to high

and resume counting from this value when the bit changes to a low value again.

Bit 6~4

T0CK2~T0CK0: Select TM0 Counter clock

000: fSYS/4

001: fSYS

010: fH/16

011: fH/64

100: fTBC

101: fH/8

110: TCK0 rising edge clock

111: TCK0 falling edge clock

These three bits are used to select the clock source for the TM. The external pin clock source can

be chosen to be active on the rising or falling edge. The clock source fSYS is the system clock,

while fH and fTBC are other internal clocks, the details of which can be found in the oscillator section.

Bit 3

T0ON: TM0 Counter On/Off Control

0: Off

1: On

This bit controls the overall on/off function of the TM. Setting the bit high enables the counter to

run, clearing the bit disables the TM. Clearing this bit to zero will stop the counter from counting

and turn off the TM which will reduce its power consumption. When the bit changes state from

low to high the internal counter value will be reset to zero, however when the bit changes from

high to low, the internal counter will retain its residual value.

If the TM is in the Compare Match Output Mode then the TM output pin will be reset to its initial

condition, as specified by the T0OC bit, when the T0ON bit changes from low to high.

Bit 2~0

²¾² Unimplemented, read as 0

HT66F016 Datasheet(PDF) 55 Page - Holtek Semiconductor Inc

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