HT66F016 datasheet(88/116 Pages) HOLTEK

88 / 116 page

HT66F016/HT66F017/HT68F016/HT68F017

Rev. 1.00

May 14, 2012

· MFI2 Register

Bit

76543210

Name

¾¾

DEF

LVF

DEE

LVE

R/W

¾¾

R/W

¾¾

R/W

POR

¾¾

Bit 7~6

unimplemented, read as

²0²

Bit 5

DEF: Data EEPROM interrupt request flag

0: No request

1: Interrupt request

Bit 4

LVF: LVD interrupt request flag

0: No request

1: Interrupt request

Bit 3~2

unimplemented, read as

²0²

Bit 1

DEE: Data EEPROM Interrupt Control

0: Disable

1: Enable

Bit 0

LVE: LVD Interrupt Control

0: Disable

1: Enable

Interrupt Operation

When the conditions for an interrupt event occur, such

as a TM Comparator P or Comparator A match or A/D

conversion completion etc, the relevant interrupt re-

quest flag will be set. Whether the request flag actually

generates a program jump to the relevant interrupt vec-

tor is determined by the condition of the interrupt enable

bit. If the enable bit is set high then the program will jump

to its relevant vector; if the enable bit is zero then al-

though the interrupt request flag is set an actual inter-

rupt will not be generated and the program will not jump

to the relevant interrupt vector. The global interrupt en-

able bit, if cleared to zero, will disable all interrupts.

When an interrupt is generated, the Program Counter,

which stores the address of the next instruction to be ex-

ecuted, will be transferred onto the stack. The Program

Counter will then be loaded with a new address which

will be the value of the corresponding interrupt vector.

The microcontroller will then fetch its next instruction

from this interrupt vector. The instruction at this vector

will usually be a

²JMP² which will jump to another sec-

tion of program which is known as the interrupt service

routine. Here is located the code to control the appropri-

ate interrupt. The interrupt service routine must be ter-

minated with a

²RETI², which retrieves the original

Program Counter address from the stack and allows the

microcontroller to continue with normal execution at the

point where the interrupt occurred.

The various interrupt enable bits, together with their as-

sociated request flags, are shown in the accompanying

diagrams with their order of priority. Some interrupt

sources have their own individual vector while others

share the same multi-function interrupt vector. Once an

interrupt subroutine is serviced, all the other interrupts

will be blocked, as the global interrupt enable bit, EMI bit

will be cleared automatically. This will prevent any fur-

ther interrupt nesting from occurring. However, if other

interrupt requests occur during this interval, although

the interrupt will not be immediately serviced, the re-

quest flag will still be recorded.

If an interrupt requires immediate servicing while the

program is already in another interrupt service routine,

the EMI bit should be set after entering the routine, to al-

low interrupt nesting. If the stack is full, the interrupt re-

quest will not be acknowledged, even if the related

interrupt is enabled, until the Stack Pointer is decre-

mented. If immediate service is desired, the stack must

be prevented from becoming full. In case of simulta-

neous requests, the accompanying diagram shows the

priority that is applied. All of the interrupt request flags

when set will wake-up the device if it is in SLEEP or

IDLE Mode, however to prevent a wake-up from occur-

ring the corresponding flag should be set before the de-

vice is in SLEEP or IDLE Mode.

HT66F016 Datasheet(PDF) 88 Page - Holtek Semiconductor Inc

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