Sensors

18

Freescale Semiconductor, Inc.

MMA685x

3.1.9

Arming Threshold Registers (ARMT_P, ARMT_N)

These registers contain the positive and negative thresholds to be used by the arming function. Refer to Section 3.8.9 for more

details regarding the arming function.

These registers can be written during initialization but are locked once the ENDINIT bit is set. Refer to Section 3.1.6.2. These

registers are included in the writable register CRC check. Refer to Section 3.2.2 for details.

The values programmed into the threshold registers are the threshold values used for the arming function as described in

Section 3.8.9. The threshold registers hold independent unsigned 8-bit values for polarity. Each threshold increment is equivalent

to one output LSB. Table 18 shows examples of some threshold register values and the corresponding threshold.

If either the positive or negative threshold is programmed to $00, comparisons are disabled for only that polarity. The arming

function still operates for the opposite polarity. If both the positive and negative arming thresholds are programmed to $00, the

Arming function is disabled, and the output pin is disabled, regardless of the value of the A_CFG bits in the DEVCFG register.

3.1.10 Device Status Register (DEVSTAT)

The device status register is a read-only register. A read of this register clears the status flags affected by transient conditions.

Reference Section 4.5 for details on the MMA685x response for each status condition.

3.1.10.1

Unused Bit (UNUSED)

The unused bit has no impact on operation or performance. When read this bit may be ‘1’ or ‘0’.

3.1.10.2

Internal Data Error Flag (IDE)

The internal data error flag is set if a customer or OTP register data CRC fault or other internal fault is detected as defined in

Section 4.5.5. The internal data error flag is cleared by a read of the DEVSTAT register. If the error is associated with a CRC fault

in the writable register array, the fault will be re-asserted and will require a device reset to clear. If the error is associated with the

data stored in the fuse array, the fault will be re-asserted even after a device reset.

3.1.10.3

Sigma Delta Modulator Over Range Flag (SDOV)

The sigma delta modulator over range flag is set if the sigma delta modulator becomes saturated. The SDOV flag is cleared

by a read of the DEVSTAT register.

Table 17. Arming Threshold Registers

Location

Bit

Address

Register

7

6543210

$10

ARMT_P

AT_P[7]

AT_P[6]

AT_P[5]

AT_P[4]

AT_P[3]

AT_P[2]

AT_P[1]

AT_P[0]

$12

ARMT_N

AT_N[7]

AT_N[6]

AT_N[5]

AT_N[4]

AT_N[3]

AT_N[2]

AT_N[1]

AT_N[0]

Reset Value

0

0000000

Table 18. Threshold Register Value Examples

Axis Type

Programmed Thresholds

Range

(g)

Sensitivity

(g/LSB)

Positive

(Decimal)

Negative

(Decimal)

Positive Threshold

(g)

Negative Threshold

(g)

20

0.04097

100

50

4.10

-2.05

20

0.04097

255

0

10.45

Disabled

50

0.1024

50

20

5.12

-2.05

120

0.24414

20

10

4.88

-2.44

Table 19. Device Status Register

Location

Bit

Address

Register

7

6543210

$14

DEVSTAT

UNUSED

IDE

SDOV

DEVINIT

MISOERR

0

OFFSET

DEVRES