TLV5614MPWREP datasheet(7/32 Pages) TI1

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TLV5614EP

2.7V TO 5.5V 12BIT 3 µs QUADRUPLE DIGITALTOANALOG CONVERTER

WITH POWER DOWN

SGLS355 − JUNE 2006

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range, Vref = 2.048 V,

AVDD = DVDD = 5 V and Vref = 1.024 V for AVDD = DVDD = 3 V (unless otherwise noted) (continued)

digital inputs (DIN, CS, LDAC, PD)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IIH

High-level digital input current

VI = VDD

±1

µA

IIL

Low-level digital input current

VI = 0 V

±1

µA

Input capacitance

power supply

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

5-V supply,

No load, Clock running,

Slow

1.6

2.4

IDD

Power-supply current

No load, Clock running,

All inputs 0 V or VDD

Fast

3.8

5.6

IDD

Power-supply current

3-V supply,

No load, Clock running,

Slow

1.2

1.8

No load, Clock running,

All inputs 0 V or DVDD

Fast

3.2

4.8

Power-down supply current (see Figure 13)

analog output dynamic performance

PARAMETER

TEST CONDITIONS

TYP

UNIT

Output slew rate

CL = 100 pF, RL = 10 kΩ,

VO = 10% to 90%,

Fast

µs

Output slew rate

VO = 10% to 90%,

Vref = 2.048 V, 1024 V

Slow

µs

Output settling time

±0.5 LSB, CL = 100 pF,

Fast

Output settling time

±0.5 LSB, CL = 100 pF,

RL = 10 kΩ, See Note 1

Slow

µs

ts(c)

Output settling time, code to code

±0.5 LSB, CL = 100 pF,

Fast

ts(c)

Output settling time, code to code

±0.5 LSB, CL = 100 pF,

RL = 10 kΩ, See Note 2

Slow

µs

Glitch energy

Code transition from 7FF to 800

nV-s

SNR

Signal-to-noise ratio

Sine wave generated by DAC,

S/(N+D)

Signal-to-noise + distortion

Sine wave generated by DAC,

Reference voltage = 1.024 at 3 V and 2.048 at 5 V,

THD

Total harmonic distortion

Reference voltage = 1.024 at 3 V and 2.048 at 5 V,

fs = 400 KSPS, fOUT = 1.1-kHz sine wave,

CL = 100 pF, RL = 10 kΩ, BW = 20 kHz

−68

SFDR

Spurious-free dynamic range

fs = 400 KSPS, fOUT = 1.1-kHz sine wave,

CL = 100 pF, RL = 10 kΩ, BW = 20 kHz

NOTES:

1. Settling time is the time for the output signal to remain within

±0.5 LSB of the final measured value for a digital input code change

of FFF hex to 080 hex for 080 hex to FFF hex.

2. Settling time is the time for the output signal to remain within

±0.5 LSB of the final measured value for a digital input code change

of one count.

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