TLV5614EP

2.7V TO 5.5V 12BIT 3 µs QUADRUPLE DIGITALTOANALOG CONVERTER

WITH POWER DOWN

SGLS355 − JUNE 2006

15

POST OFFICE BOX 655303

APPLICATION INFORMATION

data format (continued)

In power-down mode, all amplifiers within the TLV5614 are disabled. A particular DAC (A, B, C, D) of the

TLV5614 is selected by A1 and A0 within the input word.

A1

A0

DAC

0

0

A

0

1

B

1

0

C

1

1

D

TLV5614 interfaced to TMS320C203 DSP

hardware interfacing

Figure 18 shows an example of how to connect the TLV5614 to a TMS320C203 DSP. The serial port is

configured in burst mode, with FSX generated by the TMS320C203 to provide the frame synchronization (FS)

input to the TLV5614. Data is transmitted on the DX line, with the serial clock input on the CLKX line. The

general-purpose input/output port bits, IO0 and IO1, are used to generate the chip select (CS) and DAC latch

update (LDAC) inputs to the TLV5614. The active-low power down (PD) is pulled high all the time to ensure the

DACs are enabled.

DX

CLKX

FSX

I/O 0

I/O 1

TMS320C203

SDIN

SCLK

FS

CS

LDAC

REF

VDD

PD

VOUTA

VOUTB

VOUTC

VOUTD

VSS

TLV5614

REFINAB

REFINCD

Figure 18. TLV5614 Interfaced With TMS320C203

software

The application example outputs a differential in-phase (sine) signal between the VOUTA and VOUTB pins, and

its quadrature (cosine) signal as the differential signal between VOUTC and VOUTD.

The on-chip timer is used to generate interrupts at a fixed frequency. The related interrupt service routine pulses

LDAC low to update all four DACs simultaneously, then fetches and writes the next sample to all four DACs.

The samples are stored in a look-up table, which describes two full periods of a sine wave.

The synchronous serial port of the DSP is used in burst mode. In this mode, the processor generates an FS

pulse preceding the MSB of every data word. If multiple, contiguous words are transmitted, a violation of the

word has been completed.